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M74HC173

QUAD D-TYPE REGISTER (3 STATE)

STMicroelectronics 

M74HC173

QUAD D-TYPE REGISTER (3 STATE)

s HIGH SPEED:

fMAX = 84MHz (TYP.) at VCC = 6V

s LOW POWER DISSIPATION:

ICC = 4µA(MAX.) at TA=25°C

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28 % VCC (MIN.)

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL =6mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s WIDE OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 6V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 173

DESCRIPTION

The M74HC173 is an high speed CMOS QUAD

D-TYPE REGISTER (3-STATE) fabricated with

silicon gate C2MOS technology.

This device is composed of a four-bit register

including D-TYPE flip-flops and 3-state buffers.

The four flip-flops are controlled by a common

clock input (CLOCK) and a common reset input

(CLEAR). Signals applied to the data inputs (D1 -

D4) are stored at the respective flip-flops on the

positive going transition of the clock input, only

DIP

SOP

TSSOP

ORDER CODES

PACKAGE

TUBE

DIP

SOP

TSSOP

M74HC173B1R

M74HC173M1R

T&R

M74HC173RM13TR

M74HC173TTR

when both clock control inputs (G1 and G2) are

held low.

The reset feature is asynchronous and active

high. The stored data are provided on each output

only when both output control inputs (M and N) are

held low, otherwise the outputs go to the

high-impedance state.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

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