CY7C1041CV33 Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C1041CV33 Datasheet PDF : 12 Pages
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CY7C1041CV33
AC Switching Characteristics[5] Over the Operating Range (continued)
Parameter
Write Cycle[9, 10]
Description
tWC
tSCE
tAW
tHA
tSA
tPWE
tSD
tHD
tLZWE
tHZWE
tBW
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low-Z[7]
WE LOW to High-Z[7, 8]
Byte Enable to End of Write
-10
-12
-15
-20
Min. Max. Min. Max. Min. Max. Min. Max. Unit
10
12
15
20
ns
7
8
10
10
ns
7
8
10
10
ns
0
0
0
0
ns
0
0
0
0
ns
7
8
10
10
ns
5
6
7
8
ns
0
0
0
0
ns
3
3
3
3
ns
5
6
7
8
ns
7
8
10
10
ns
Switching Waveforms
Read Cycle No. 1[11, 12]
tRC
ADDRESS
DATA OUT
tAA
tOHA
PREVIOUS DATA VALID
DATA VALID
Read Cycle No. 2 (OE Controlled)[12, 13]
ADDRESS
tRC
CE
OE
BHE, BLE
tACE
tDOE
tLZOE
tDBE
tLZBE
DATA OUT
VCC
SUPPLY
CURRENT
HIGH IMPEDANCE
tLZCE
tPU
50%
DATA VALID
Notes:
10. The minimum Write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.
11. Device is continuously selected. OE, CE, BHE and/or BHE = VIL.
12. WE is HIGH for Read cycle.
13. Address valid prior to or coincident with CE transition LOW.
tHZOE
tHZCE
tHZBE
HIGH
IMPEDANCE
tPD
50%
IICCCC
IISSBB
Document #: 38-05134 Rev. *H
Page 6 of 12
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