HD74LV125ARPEL Ver la hoja de datos (PDF) - Renesas Electronics

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HD74LV125ARPEL

Quad. Bus Buffer Gates with 3-state Outputs

Renesas Electronics 

HD74LV125A

Noise Characteristics

Item

Quiet output, maximum

dynamic VOL

Quiet output, minimum

dynamic VOL

Quiet output, minimum

dynamic VOH

High-level dynamic input

voltage

Low-level dynamic input

voltage

Symbol VCC = (V)

VOL (P)

3.3

Ta = 25°C

Min

Typ

—

0.3

VOL (V)

3.3

—

–0.3

VOH (V)

3.3

—

3.0

VIH (D)

3.3

2.31

—

VIL (D)

3.3

—

—

Max

0.8

–0.8

—

—

0.99

CL = 50 pF

Unit Test Conditions

V

V

V

V

V

Test Circuit

VCC

VCC

Input

Pulse Generator

Z OUT = 50 Ω

Output

1 k Ω S1

CL =

15 or 50 pF

OPEN

*1 See under table

GND

TEST

tPLH /tPHL

t ZH/tHZ

tZL /tLZ

S1

OPEN

GND

VCC

Note: 1. CL includes probe and jig capacitance.

Rev.3.00 Jun. 03, 2004 page 6 of 9

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