AV9248-87 Ver la hoja de datos (PDF) - Integrated Circuit Systems
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AV9248-87 Datasheet PDF : 13 Pages
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ICS9248-87
Preliminary Product Preview
Serial Configuration Command Bitmap
Byte4: Functionality and Frequency Select Register (default = 0)
Bit
Description
Bit (2, 7:4)
CPUCLK CPU/ SDRAM
(MHz) SDRAM (MHz)
00000
83.3 1.00
83.3
0000 1
124.00
1.00 124.00
000 10
155.00 1.00 155.00
000 11
143.96
1.33 108.00
00 100
70.00 0.67 105.00
00 10 1
112.00
1.00 112.00
00 110
150.00 1.00 150.00
00 111
140.00
1.33 105.00
0 1000
68.33 0.67 102.50
0 100 1
107.00
1.00 107.00
0 10 10
138.00 1.00 138.00
0 10 11
137.33 1.33 103.00
0 1100
66.80 0.67 100.20
0 110 1
Bit 2,
Bit 7:4
0
1
1
1
0
0 1111
100.30
133.60
133.60
1.00 100.30
1.00 133.60
1.33 100.20
10 0 0 0
145.00 1.00 145.00
1000 1
140.00
1.00 140.00
100 10
136.00 1.00 136.00
100 11
130.00
1.00 130.00
10 100
129.00 1.00 129.00
10 10 1
127.00
1.00 127.00
10 110
121.00 1.00 121.00
10 111
119.00
1.00 119.00
1 10 0 0
117.00 1.00 117.00
1100 1
114.00
1.00 114.00
110 10
110.00 1.00 110.00
110 11
105.00
1.00 105.00
1 1 10 0
75.33 0.67 113.00
1110 1
153.33 1.33 115.00
1 1 1 10
150.63 1.33 113.00
11111
146.63 1.33 110.00
Bit 3
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit 2, 7:4
Bit 1
0 - Normal
1 - Spread Spectrum Enabled ± 0.25% Center Spread
Bit 0
0 - Running
1- Tristate all outputs
3V66
(MHz)
PCICLK
(MHz)
IOAPIC
(MHz)
=PCI/2 =PCI
55.48 27.74 13.87 27.74
82.67 41.33 20.67 41.33
103.33 51.67 25.83 51.67
72.00 36.00 18.00 36.00
70.00 35.00 17.50 35.00
74.67 37.33 18.67 37.33
100.00 50.00 25.00 50.00
70.00 35.00 17.50 35.00
68.33 34.17 17.08 34.17
71.33 35.67 17.83 35.67
92.00 46.00 23.00 46.00
68.67 34.34 17.17 34.34
66.80 33.40 16.70 33.40
66.80 33.40 16.70 33.40
89.07 44.53 22.27 44.53
66.80 33.40 16.70 33.40
96.67 48.33 24.17 48.33
93.33 46.67 23.33 46.67
90.67 45.33 22.67 45.33
86.67 43.33 21.67 43.33
86.00 43.00 21.50 43.00
84.67 42.33 21.17 42.33
80.67 40.33 20.17 40.33
79.33 39.67 19.83 39.67
78.00 39.00 19.50 39.00
76.00 38.00 19.00 38.00
73.33 36.67 18.33 36.67
70.00 35.00 17.50 35.00
75.33 37.67 18.83 37.67
76.67 38.33 19.17 38.33
75.33 37.67 18.83 37.67
73.33 36.67 18.33 36.67
PWD
00100
Note1
0
1
0
Note1: Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
1) All entries selectable through I2C. Entries 1 -16 are also selectable through FS pins.
2) The IOAPIC Frequency change from IOAPIC=PCICLK/2 to IOAPIC=PCICLK is
controlled by IOAPC_Freq control in I2C Byte 3 Bit 1, default is IOAPIC=PCICLK/2.
3) Read back code of PWD shows revision ID.
I2C is a trademark of Philips Corporation
Third party brands and names are the property of their respective owners.
4
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