ML9473 Ver la hoja de datos (PDF) - LAPIS Semiconductor Co., Ltd.
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ML9473 Datasheet PDF : 20 Pages
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LAPIS Semiconductor
FEDL9473-01
ML9473
PIN DESCRIPTION
Symbol
OSC_IN
OSC_OUT
OSC_OUT
DATA_IN
CLOCK
LOAD
BLANK
DSEL1
DSEL2
COM1 to
COM5
SEG1 to
SEG60
VLC1, VLC2,
VLC3
VDD, GND
Type
I
O
O
I
I
I
l
I
I
O
O
—
—
Description
Pins for oscillation. The oscillator circuit is configured by externally connecting two
resistors and a capacitor. Make the wiring length as short as possible, because
the resistor connected to the OSC_IN pin has a higher value and the circuit is
susceptible to external noise.
Serial data input pin. The display goes on when input data is at a “H” level, and it
goes off when input data is at a “L” level.
Shift clock input pin. Data from the DATA_IN pin is transferred in synchronization
with the rising edge of the shift clock.
Load signal input pin. Serially input data is transferred to the 60-bit latch at “H”
level of this load signal, then held at “L” level.
Input pin that turns off all segments. The entire display goes off when “L” level is
applied to this pin. The display returns to the previous state when “H” level is
applied.
Input pins to select 1/3, 1/4, or 1/5 duty. Following shows how each duty is
selected.
DSEL2
DSEL1
Duty selected
L
L
1/3
L
H
1/4
H
X
1/5
X: Don’t care
Display output pins for LCD. These pins are connected to the COMMON side of
the LCD panel.
Display output pins for LCD. Theses pins are connected to the SEGMENT side of
the LCD panel. For the correspondence between the output of these pins and
input data, see the “Data Structure” Section.
Bias pins for LCD driver. Through these pins, bias voltages for the LCD are
externally supplied. The bias potential must meet the following condition:
VDD > VLC1 VLC2 > VLC3 =GND
Supply voltage pin and ground pin.
Note: Built-in schmitt circuit is used for all input pins.
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