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HD74LV374ARPEL(2010) Ver la hoja de datos (PDF) - Renesas Electronics

Número de pieza
componentes Descripción
Lista de partido
HD74LV374ARPEL
(Rev.:2010)
Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs
Renesas
Renesas Electronics Renesas
HD74LV374ARPEL Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HD74LV374A
Switching Characteristics
Item
Maximum clock
frequency
Propagation
delay time
Enable time
Disable time
Setup time
Hold time
Pulse width
Symbol
tmax
tPLH
tPHL
tZH
tZL
tHZ
tLZ
tSU
th
tw
Ta = 25°C
Min Typ
60 105
50 85
— 9.7
— 11.8
— 8.9
— 10.9
— 6.3
— 8.2
5.0 —
2.5 —
6.0 —
Max
—
—
16.3
19.3
15.9
18.8
12.6
17.3
—
—
—
Ta = –40 to 85°C
Min
Max
50
—
40
—
1.0
19.0
1.0
23.0
1.0
19.0
1.0
22.0
1.0
15.0
1.0
19.0
5.5
—
2.5
—
7.0
—
Unit
MHz
ns
ns
ns
ns
ns
ns
Test
Conditions
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
Item
Maximum clock
frequency
Propagation
delay time
Enable time
Disable time
Setup time
Hold time
Pulse width
Symbol
tmax
tPLH
tPHL
tZH
tZL
tHZ
tLZ
tSU
th
tw
Ta = 25°C
Min Typ
80 150
55 110
— 6.8
— 8.3
— 6.3
— 7.7
— 4.7
— 5.9
4.5 —
2.0 —
5.0 —
Max
—
—
12.7
16.2
11.0
14.5
10.5
14.0
—
—
—
Ta = –40 to 85°C
Min
Max
70
—
50
—
1.0
15.0
1.0
18.5
1.0
13.0
1.0
16.5
1.0
12.5
1.0
16.0
4.5
—
2.0
—
5.5
—
Test
Unit Conditions
MHz
ns
ns
ns
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
ns
ns
Item
Maximum clock
frequency
Propagation
delay time
Enable time
Disable time
Setup time
Hold time
Pulse width
Symbol
tmax
tPLH
tPHL
tZH
tZL
tHZ
tLZ
tSU
th
tw
Ta = 25°C
Min Typ
130 205
85 170
— 4.9
— 5.9
— 4.6
— 5.5
— 3.4
— 4.0
3.0 —
2.0 —
5.0 —
Max
—
—
8.1
10.1
7.6
9.6
6.8
8.8
—
—
—
Ta = –40 to 85°C
Min
Max
110
—
75
—
1.0
9.5
1.0
11.5
1.0
9.0
1.0
11.0
1.0
8.0
1.0
10.0
3.0
—
2.0
—
5.0
—
Unit
MHz
ns
ns
ns
ns
ns
ns
Test
Conditions
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
VCC = 2.5 ± 0.2 V
FROM TO
(Input) (Output)
CLK
Q
OE
Q
OE
Q
Data before CLK ↑
Data after CLK ↑
CLK: "H" or "L"
VCC = 3.3 ± 0.3 V
FROM TO
(Input) (Output)
CLK
Q
OE
Q
OE
Q
Data before CLK ↑
Data after CLK ↑
CLK: "H" or "L"
VCC = 5.0 ± 0.5 V
FROM TO
(Input) (Output)
CLK
Q
OE
Q
OE
Q
Data before CLK ↑
Data after CLK ↑
CLK: "H" or "L"
Rev.2.00 Jun. 25, 2004 page 5 of 9

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