CDB53L32A Ver la hoja de datos (PDF) - Cirrus Logic

Número de pieza

componentes Descripción

fabricante

CDB53L32A

Low Voltage, Stereo A/D Converter

Cirrus Logic 

CS53L32A

SWITCHING CHARACTERISTICS - CONTROL PORT - TWO WIRE MODE

(TA = 25° C; VL = 1.7 V - 3.6 V; Inputs: logic 0 = GND, logic 1 = VL, CL = 30 pF)

Two Wire Mode

Parameter

Symbol

Min

Max

Unit

SCL Clock Frequency

fscl

-

RST Rising Edge to Start

tirs

500

Bus Free Time Between Transmissions

tbuf

4.7

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

Clock Low time

tlow

4.7

Clock High Time

thigh

4.0

Setup Time for Repeated Start Condition

tsust

4.7

SDA Hold Time from SCL Falling

(Note 10) thdd

0

SDA Setup time to SCL Rising

tsud

250

Rise Time of SCL

trc

-

Fall Time of SCL

tfc

-

Rise Time of SDA

trd

-

Fall Time of SDA

tfd

-

Setup Time for Stop Condition

tsusp

4.7

100

KHz

-

ns

-

µs

-

µs

-

µs

-

µs

-

µs

-

µs

-

ns

25

ns

25

ns

1

us

300

ns

-

µs

Note: 10. Data must be held for sufficient time to bridge the transition time, tf, of SCL

.

RRSSTT

SDA

SDA

SCL

SCL

tt iirrss

SSttoopp

SSttaarrtt

t

t

buf

buf

t

t

hdst

hdst

t low

t

low

t

t

high

high

t hdd

t

hdd

RReeppeeaatteedd

SSttaarrtt

t

t

hdst

hdst

t

t

f

f

t sud

t sust

tr

t sud

t sust

tr

Figure 4. Control Port Timing - Two Wire Mode

SSttoopp

t susp

t susp

12

DS513F1

Share Link: