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TK75005MCMG Ver la hoja de datos (PDF) - Toko America Inc

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TK75005MCMG
Toko
Toko America Inc  Toko
TK75005MCMG Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
TK75005
APPLICATIONS INFORMATION
BOOST POWER FACTOR CORRECTOR APPLICATION
CIRCUIT
Figure 7 shows a universal-input, 100 W boost power
factor corrector application circuit. The control technique is
called “current-clamped control.” Both the control technique
and the application circuit with waveforms are described in
the paper “Low-Cost Power Factor Correction/Line-
Harmonics Reduction with Current-Clamped Boost
Converter,” published in the conference proceedings of
Power Conversion Electronics ’95/Powersystems World™
’95. A copy of the paper can be obtained by contacting
Toko.
Switching frequency:
Inductance of boost inductor:
f = 100 kHz
L1 = 2.5 mH
Maximum duty ratio of TK75005: DMAX = 0.88
Peak value of ramp current
flowing out of the FB pin:
ISC(PK) = 200 µA
Threshold voltage of the
current-control detector:
VCCD = 0.98 V
Calculations:
For designers who wish to explore other performance
optimizations of the current-clamped boost power factor
corrector, aside from the conference paper Toko offers a
Mathcad© file which can accurately display current
waveforms and predict power factor, harmonic distortion,
and individual harmonic currents. The Mathcad file and the
text which describes how to use it are available from the
Colorado Springs Toko IC Design Center.
The power factor corrector in Figure 7 has been optimized
for general wide-range-input use. In order to obtain the
same performance at power levels other than 100 W, the
control components do not need to change. The power
component values change as follows: C8 scales in
proportion to the power level, and L1 and R8 scales in
inverse proportion to the power level. Typically, although
not directly related to the line-current shaping capability of
the application circuit, C1 and C10 would scale in proportion
to the power level. All the components in the power stage
should have a current rating as needed to accommodate
the power level.
Below is a step-by-step design example, showing how to
determine the resistance of R7 terminating the feedback
pin and the resistance of the current-sense resistor R8, for
the boost corrector of Figure 7.
Assumptions:
Peak value of minimum line voltage:
VI(MIN)(PK) = 2 x VI(MIN) = 120 VPK
Switch duty ratio at peak of minimum line voltage:
D = 1 - VI(MIN)(PK) / VOUT = 0.684
Peak-to-peak ripple current in inductor L1:
I = VI(MIN)(PK) x D / (f x L1) = 0.33 A
Input power at minimum line voltage:
PI = POUT / EFF = 107.5 W
Peak current in L1 (at peak of minimum line voltage):
IL1(PK) = 2 x PI / VI(MIN)(PK) + I/2 = 1.95 A
Output power:
Output voltage:
Minimum line voltage:
Efficiency at 85 Vrms:
POUT = 100 W
VOUT = 380 Vdc
VI(MIN) = 85 Vrms
EFF = 0.93
Resistance of resistor R7 (Note 1):
R7 = DMAX x VCCD / ISC(PK) = 4.312 kohms
January 1999 TOKO, Inc.
Page 7

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