PI6C2520A Ver la hoja de datos (PDF) - Pericom Semiconductor
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PI6C2520A Datasheet PDF : 6 Pages
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PI6C2520
Low-Noise, Phase-Locked Loop
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Pin Functions
Pin Name
Pin Number
Type
Description
CLK_IN
12
I Clock input. CLK allows spread spectrum.
FB_IN
45
I Feedback input. FB_IN provides the feedback signal to the internal PLL.
1G
9
I
Output bank enable. When 1G is LOW, outputs 1Y[0:3] are disabled to
a logic low state. When 1G is HIGH, all outputs 1Y[0:3] are enabled.
2G
16
I
Output bank enable. When 2G is LOW, outputs 2Y[0:3] are disabled to
a logic low state. When 2G is HIGH, all outputs 2Y[0:3] are enabled.
3G
41
I
Output bank enable. When 3G is LOW, outputs 3Y[0:3] are disabled to
a logic low state. When 3G is HIGH, all outputs 3Y[0:3] are enabled.
4G
48
I
Output bank enable. When 4G is LOW, outputs 4Y[0:3] are disabled to
a logic low state. When 4G is HIGH, all outputs 4Y[0:3] are enabled.
5G
14
I
Output bank enable. When 5G is LOW, outputs 5Y[0:3] are disabled to
a logic low state. When 5G is HIGH, all outputs 5Y[0:3] are enabled.
FB_OUT
43
Feedback output. FB_OUT is dedicated for external feedback. FB_OUT
O has an embedded series-damping resistor of the same value as the clock outputs
1Yx, 2Yx, 3Yx, 4Yx, and 5Yx.
1Y[0:3]
2,3,6,7
O
Clock outputs. These outputs provide low-skew copies of CLK.
Each output has an embedded series-damping resistor.
2Y[0:3]
18,19,22,23
O
Clock outputs. These outputs provide low-skew copies of CLK.
Each output has an embedded series-damping resistor.
3Y[0:3]
39,38,35,34
O
Clock outputs. These outputs provide low-skew copies of CLK.
Each output has an embedded series-damping resistor.
4Y[0:3]
55,54.51,50
O
Clock outputs. These outputs provide low-skew copies of CLK.
Each output has an embedded series-damping resistor.
5Y[0:3]
26,27,30,31
O
Clock outputs. These outputs provide low-skew copies of CLK.
Each output has an embedded series-damping resistor.
AVCC
11,46
Analog power supply. AVCC can be also used to bypass the PLL for
Power test purposes. When AVCC is strapped to ground, PLL is bypassed and
CLK is buffered directly to the device outputs.
AGND
13,44
Ground Analog ground. AGND provides the ground reference for the analog circuitry
VCC
1,8,17,24,25,32,33,40,
49,56
Power
Power supply
GND
4,5,10,15,20,21,28,29,
36,37,42,47,52,53
Ground
Ground
2
PS8435B 07/25/00
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