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3793DC Ver la hoja de datos (PDF) - Cypress Semiconductor

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3793DC Datasheet PDF : 24 Pages
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MB3793-27D/28D/30D
4. Block Functions
Comp.S
Comp.S is a comparator with hysteresis to compare the reference voltage with a voltage (VS) that is the result of dividing the
power supply voltage (VCC) by resistors R1 and R2. When VS falls below 1.24 V, a reset signal is output. This function enables the
MB3793 to detect an abnormality within 1 µs when the power supply is cut or falls instantaneously.
Output Circuit
The output circuit has a comparator to control the reset signal (/RESET) output. When the voltage at the CTP pin for setting the
power-on reset hold time exceeds the threshold voltage, resetting is canceled.
Pulse Generator
The pulse generator generates pulses when the voltage at the CK1 and CK2 input clock pins changes from Low level to High
level (positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the watchdog timer.
Watchdog Timer
The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock pins to monitor a single clock pulse.
Logic Circuit
The logic circuit controls charging and discharging of the power-on reset hold time setting capacity (CTP) on a signal of Comp.S
and Watchdog timer.
Document Number: 002-08488 Rev.*C
Page 5 of 24

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