W83977EF-AW(2003) Ver la hoja de datos (PDF) - Winbond

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W83977EF-AW
(Rev.:2003)

WINBOND I/O

Winbond 

W83977EF

TABLE OF CONTENTS

GENERAL DESCRIPTION ..................................................................................................................... 1

FEATURES ............................................................................................................................................. 2

PIN CONFIGURATION ........................................................................................................................... 5

1.0 PIN DESCRIPTION.......................................................................................................................... 6

1.1 HOST INTERFACE ............................................................................................................................. 6

1.2 GENERAL PURPOSE I/O PORT .......................................................................................................... 8

1.3 SERIAL PORT INTERFACE.................................................................................................................. 9

1.4 INFRARED INTERFACE..................................................................................................................... 10

1.5 MULTI-MODE PARALLEL PORT ........................................................................................................ 11

1.6 FDC INTERFACE ............................................................................................................................ 16

1.7 KBC INTERFACE ............................................................................................................................ 18

1.8 POWER PINS .............................................................................................................................. 18

1.9 ACPI INTERFACE ........................................................................................................................... 18

2.0 FDC FUNCTIONAL DESCRIPTION............................................................................................... 19

2.1 W83977EF FDC .......................................................................................................................... 19

2.1.1 AT interface ........................................................................................................................... 19

2.1.2 FIFO (Data) ........................................................................................................................... 19

2.1.3 Data Separator...................................................................................................................... 20

2.1.4 Write Precompensation......................................................................................................... 20

2.1.5 Perpendicular Recording Mode ............................................................................................ 21

2.1.5 Perpendicular Recording Mode ............................................................................................ 21

2.1.6 FDC Core .............................................................................................................................. 21

2.1.7 FDC Commands ................................................................................................................... 21

2.2 REGISTER DESCRIPTIONS............................................................................................................... 33

2.2.1 Status Register A (SA Register) (Read base address + 0) .................................................. 33

2.2.2 Status Register B (SB Register) (Read base address + 1) .................................................. 35

2.2.3 Digital Output Register (DO Register) (Write base address + 2).......................................... 37

2.2.4 Tape Drive Register (TD Register) (Read base address + 3) .............................................. 37

2.2.5 Main Status Register (MS Register) (Read base address + 4) ............................................ 38

2.2.6 Data Rate Register (DR Register) (Write base address + 4) ............................................... 38

2.2.7 FIFO Register (R/W base address + 5) ................................................................................ 40

2.2.8 Digital Input Register (DI Register) (Read base address + 7) .............................................. 42

2.2.9 Configuration Control Register (CC Register) (Write base address + 7) ............................. 43

3.0 UART PORT.................................................................................................................................... 45

3.1 UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER (UART A, UART B) .................................... 45

3.2 REGISTER ADDRESS ...................................................................................................................... 45

3.2.1 UART Control Register (UCR) (Read/Write) ........................................................................ 45

3.2.2 UART Status Register (USR) (Read/Write) .......................................................................... 48

3.2.3 Handshake Control Register (HCR) (Read/Write)................................................................ 48

Publication Release Date: April 2003

-II -

Revision 1.1

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