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M6MF16S2AVP Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC

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M6MF16S2AVP Datasheet PDF : 20 Pages
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PRELIMINARY Notice
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MITSUBISHI LSIs
M6MF16S2AVP
16777216-BIT (2 M x 8-BIT)
CMOS 3.3V-ONLY FLASH MEMORY
1. Flash Memory
FUNCTION
The Flash Memory of M6MF16S2AVP includes on-chip
program/erase control circuitry. The Write State Machine (WSM)
controls block erase, page (256byte) program operations.
Operational modes are selected by the commands written to the
Command User Interface (CUI). The Status Register indicates the
status of the WSM and when the WSM successfully completes the
desired program or block erase operation.
A Deep Powerdown mode is enabled when the RP# pin is at GND,
minimizing power consumption.
Read
The Flash Memory of M6MF16S2AVP has three read modes,
which accesses to the memory array, the Device Identifier and the
Status Register. The appropriate read command are required to
be written to the CUI. Upon initial device powerup or after exit
from deep powerdown, the Flash Memory automatically resets to
read array mode. In the read array mode, low level input to CE#
and OE#, high level input to WE# and RP#, and address signals to
the address inputs (A0-A20) output the data of the addressed
location to the data input/output(D0-D7).
Write
Writes to the CUI enable reading of memory array data, device
identifiers and reading and clearing of the Status Register. they
also enable block erase and program. The CUI is written by
bringing WE# to low level, while CE# is at low level and OE# is at
high level. Addresses and data are latched on the earlier rising
edge of WE# and CE#. Standard micro-processor write timings
are used.
Output Disable
When OE# is at VIH, output from the devices is disabled. Data
input/output are in a high-impedance(High-Z) state.
Standby
When CE# is at VIH, the device is in the standby mode and its
power consumption is reduced. Data input/output are in a
high-impedance(High-Z) state. If the memory is deselected during
block erase or program, the internal control circuits remain active
and the device consume normal active power until the operation
completes.
Deep Power-Down
When RP# is at VIL, the device is in the deep powerdown mode
and its power consumption is substantially low. During read
modes, the memory is deselected and the data input/output are in
a high-impedance(High-Z) state. After return from powerdown, the
CUI is reset to Read Array , and the Status Register is cleared to
value 80H.
During block erase or program modes, RP# low will abort either
operation. Memory array data of the block being altered become
invalid.
SOFTWARE COMMAND DEFINITIONS
The device operations are selected by writing specific software
command into the CUI.
Read Array Command (FFH)
The device is in Read Array mode on initial device powerup and
after exit from deep powerdown, or by writing FFH to the CUI. The
device remains in Read Array mode until the other commands are
written.
Read Device Identifier Command (90H)
The Device Identifier is read after writing the Read Device
Identifier command of 90H to the Command User Interface.
Following the command write, the manufacturer code and the
device code can be read from address 000000H and 000001H,
respectively.
Read Status Register Command (70H)
The Status Register is read after writing the Read Status Register
command of 70H to the Command User Interface.
The contents of Status Register are latched on the later falling
edge of OE# or CE#. So CE# or OE# must be toggled every status
read.
Clear Status Register Command (50H)
The Erase Status and Program Status bits are set to "1"s by
the Write State Machine and can be reset by the Clear Status
Register command of 50H. These bits indicates various failure
conditions.
Block Erase / Confirm Command (20H/D0H)
Automated block erase is initiated by writing the Block Erase
command of 20H followed by the Confirm command of D0H. An
address within the block to be erased is required. The WSM
executes iterative erase pulse application and erase verify
operation.
Suspend/Resume Command (B0H/D0H)
Writing the Suspend command of B0H during block erase
operation interrupts the block erase operation and allows read out
from another block of memory. Writing the Suspend command of
B0H during program operation interrupts the program operation
and allows read out from another block of memory. The device
continues to output Status Register data when read, after the
Suspend command is written to it. Polling the WSM Status and
Suspend Status bits will determine when the erase operation or
program operation has been suspended. At this point, writing of
the Read Array command to the CUI enables reading data from
blocks other than that which is suspended. When the Resume
command of D0H is written to the CUI, the WSM will continue with
the erase or program processes.
3
May.1998 , Rev.1.2

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