TQ5131 Ver la hoja de datos (PDF) - TriQuint Semiconductor
Número de pieza
componentes Descripción
Lista de partido
TQ5131 Datasheet PDF : 14 Pages
| |||
TQ5131
Data Sheet
AMPS IF Amplifier
This amplifier also uses an open drain stage with a self-bias
circuit. No Quiescent current adjustments are possible in this
mode since the bias circuit is on-chip. While the IF output can
be tuned for frequencies as high as 500 MHz, the
downconverter performance is limited by the internal tuned
circuit of the LO buffer amplifier. The highest IF that can be used
without significant deviation from typical performance is 130
MHz. This output is a high impedance open drain FET z = 5.42
– j 9.04 Ω (normalized). The match requires a RF choke to Vdd
for proper biasing (see figure 6). Typical AMPS IF output
impedance is shown in figure 7.
Figure 6. AMPS IF Output Match (IF = 85 MHz)
TQ5131
1
8
2
7
3
6
C9=12pF
4
5
L3=270nH
C10=18pF
AMPS
IF
Vdd
Note: These values were optimized for TriQuint's 5131 Demo
board. The discrepancy between these values and those of the
customer's application may differ due to board and component
parasitics.
1.0
AMIF output
0.5
2.0
E Impedance
0.91 @ - 9.3
z = 5.42 - j 9.04
y = 0.05 + j 0.08
0.5
1.0
2.0
E
-0.5
-2.0
-1.0
Figure 7. AMPS Output Impedance at Pin 5
Vdd Decoupling
External spurious signals at high and low frequencies can
appear on the Vdd lines. Proper decoupling of these lines is
required to eliminate unwanted noise. The recommended
decoupling network has a PI configuration. On the main Vdd
node, a large capacitor of 0.022 uF is use, followed by a 3.3 or
10 ohm resistor in series with the supply line, then another
bypass cap that presents a low impedance to ground at the RF
frequency of interest. The Vdd, pin 8, is bypassed on chip.
Therefore, all that is needed is a series 3.3 to 10Ω resistor to
the large capacitor, 0.022µFd.
Board Layout Recommendations
All ground pins should be kept close to the IC and have its own
via to the ground plane to minimize inductance.
Most PC boards for portable applications have thin dielectric
layers and very narrow line width which increase the board
parasitic capacitance and inductance. To minimize these effects
when implementing a matching network, it is recommended to
relieve the ground underneath pads carrying RF signals
whenever possible.
Control Line Description
The control lines can be toggled between high and low levels
using CMOS logic circuitry. Control line C1 is used to switch
between CDMA and AMPS IF output. The other two control
lines C2 and C3, which are also tied to the LNA gain select and
LNA mode respectively, set the various CDMA output levels
required by the system.
Receiver State
C1 C2 C3
AMPS Mode
001
CDMA High Gain
100
CDMA HG, low lin
101
CDMA Mid Gain
110
CDMA Low Gain
111
Table 1. Downconverter Control Bits
10
For additional information and latest specifications, see our website: www.triquint.com
Share Link: 