AS6C1008-55TINL Ver la hoja de datos (PDF) - Alliance Semiconductor
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AS6C1008-55TINL Datasheet PDF : 15 Pages
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AS6C1008L
128k x 8 BIT SUPER LOW POWER CMOS SRAM
CAPACITANCE (TA = 25OC, f = 1.0MHz)
PARAMETER
SYMBOL
MIN.
Input Capacitance
CIN
-
Input/Output Capacitance
CI/O
-
Note : These parameters are guaranteed by device characterization, but not production tested.
MAX
6
8
UNIT
pF
pF
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to VCC - 0.2V
3ns
1.5V
CL = 50pF + 1TTL, IOH/IOL = -1mA/2mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
SYM.
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
AS6C1008L
MIN. MAX.
35
-
-
35
-
35
-
25
10
-
5
-
-
15
-
15
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
(2) WRITE CYCLE
PARAMETER
SYM. AS6C1008L UNIT
MIN. MAX.
Write Cycle Time
tWC
35
-
ns
Address Valid to End of Write
tAW
30
-
ns
Chip Enable to End of Write
tCW
30
-
ns
Address Set-up Time
tAS
0
-
ns
Write Pulse Width
tWP
25
-
ns
Write Recovery Time
tWR
0
-
ns
Data to Write Time Overlap
tDW
20
-
ns
Data Hold from End of Write Time tDH
0
-
ns
Output Active from End of Write
tOW*
5
-
ns
Write to Output in High-Z
tWHZ*
-
15
ns
*These parameters are guaranteed by device characterization, but not production tested.
Confidential
- 5/15 -
Rev.2.a April 2016
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