CMX641A Ver la hoja de datos (PDF) - MX-COM Inc
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CMX641A Datasheet PDF : 23 Pages
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Dual SPM/Security Detector/Generator
2. Signal List
D2
Pin No.
1
P4
Pin No.
1
Signal
Name
XTAL
2
2
3
3
XTALN
CLOCK OUT
4
4
5
5
CLOCK IN
OP ENABLEN
6
6
CH2 OP
7
7
CH1 OP
8
8
9
9
10
10
11
11
12
12
VBIAS
CH1 AMP OP
CH1 AMP IN (-)
CH1 AMP IN (+)
VSS
4 of 23
CMX641A Advance Information
Description
Type
I/P
O/P
O/P
I/P
I/P
O/P
O/P
O/P
O/P
I/P
I/P
POWER
The input of the on-chip oscillator for use with a
3.579545MHz Xtal in conjunction with the
XTALN output; circuit components are on-chip.
When using an Xtal input, the CLOCK OUT pin
should be connected directly to the CLOCK IN
pin. If an external clock input is employed at the
CLOCK IN pin, the XTAL pin must be connected
directly to VDD (see Figure 2). See Figure 4 for
details of clock frequency distribution.
The inverted output of the on-chip oscillator.
The buffered output of the on-chip oscillator
inverter. If a XTAL input is employed, this output
should be connected directly to the CLOCK IN
pin. This output can support up to 3 additional
CMX641A microcircuits. See Figure 4 for details
of clock distribution.
The 3.579545MHz input to the internal clock
dividers. If an externally generated clock pulse
input is employed, XTAL input pin should be
connected to VDD.
For multi-chip output multiplexing; controls the
state of both Ch1 and Ch2 outputs. When this
input is placed high (logic ‘1’) both outputs are
set to a high impedance. When placed at logic
low, both outputs are enabled.
The digital output of the channel 2 SPM detector
when enabled. The format of the signal at this
pin, in common with CH1 OP is selectable to
either ‘Tone Follower’ or ‘Packet mode’ via the
OP SELECT pin. Logic ‘0’ when tone is detected.
The digital output of the channel 1 SPM detector
when enabled. The format of the signal at this
pin, in common with CH2 OP is selectable to
either ‘Tone Follower’ or ‘Packet mode’ via the
OP SELECT pin. Logic ‘0’ when tone is detected.
A bias line for the internal circuitry, held at ½VDD.
This pin must be decoupled to VSS by a capacitor
mounted close to the device pins.
The output of the Channel 1 input amplifier. See
Figure 2 and Figure 3.
The negative input to the Channel 1 input
amplifier. See Figure 2 and Figure 3.
The positive input to the Channel 1 Input
amplifier. See Figure 2 and Figure 3.
The negative supply rail (ground).
ã2001 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480227.002
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies.
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