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CMX850-1

Communications Controller IC

CML Microsystems Plc 

Embedded Enhanced 80C51 Microcontroller and Peripherals

All the features of a standard 80C51 µC augmented by many new and flexible functions

Hardware

n 8kbytes of internal RAM

n Addressing for 64kbytes of external program memory, 64kbytes of external SRAM and an external

LCD controller

n On-Chip Boot ROM (‘thin-stub’/’thick-stub’ loader)

n Dual clock system with sub-divided main clock and multiple powersaving options

n Two input 10-bit A-to-D converter

n ‘C-BUS’ controller to on-chip modem

n Watchdog timer

n Real time clock and alarm

n Multiplexed address / data mode giving extra I/O and debug help

n Keyboard encoder (16 x 8 matrix)

n Two low-power PWM outputs

Modem/µC

Interface

ADC

WDT

RTC

CLI

Decode

8k

XRAM

80C51

Local

RAM

24-Bit

I/O

External XRAM Addressing

n Simple addressing of up to 64kB of SRAM

n Increased memory addressing using port-pins for ‘page mode’ and ‘program memory’ operation

Real and Virtual Timing

n Selectable Real Time (long period) Clock timer with alarm facilities

n WatchDog Timer for CMX850 system monitoring

n Wide range of timeout values

n Timeout ‘reset’ or ‘interrupt’ options

Software

n Additional interrupts serve new controller functions

n MOVX read and write to internal XRAM, external ROM/FLASH, external SRAM or external

LCD controller

n Dual data pointers for easy data-block moves

n Special Function Register (SFR) extensions to interface with new 80C51 features

PROM Emulator Interfacing

n Interrupt Int 9 provides control priority for program review and problem solving

n MOVX read/write stretch for slower peripherals

PWM

I/O

Keyb’d

Scanner

LCD Interface

n Compatible with any size LCD

n Direct interface with 4- or 8-bit data bus

Keyboard Encoder

n Full ‘n-key’ rollover with key debounce and separate ‘press’ and ’release’ indications

n 8-character FIFO data buffer

n Automatic ‘sleep’/’wake-up’ option for low-power operation and reduced EMI

n 8 row input pins with integral pull-up resistors

n 1 to 13 column drive pins - increased to 16 by multiplexed memory interface

ADC Inputs

n For signal and level monitoring

n Multiplexed to 10-bit ADC

n ‘One-shot’ or ‘continuous convert’ mode with sample and hold facility

n Selectable sample rate; up to 20kHz

n Interrupt generation available

Low-Power PWM Outputs

n Two independent, 8-bit Pulse Width Modulation outputs

n Fixed frequency square-wave output with programmable duty cycle

Memory

Interface

4

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