GS881Z18BD Ver la hoja de datos (PDF) - Giga Semiconductor

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componentes Descripción

Lista de partido

GS881Z18BD

9Mb Pipelined and Flow Through Synchronous NBT SRAM

Giga Semiconductor 

GS881Z18B(T/D)/GS881Z32B(T/D)/GS881Z36B(T/D)

Undershoot Measurement and Timing

VIH

VSS

50%

VSS – 2.0 V

50% tKC

Overshoot Measurement and Timing

VDD + 2.0 V

50%

50% tKC

VDD

VIL

Capacitance

(TA = 25oC, f = 1 MHZ, VDD = 2.5 V)

Parameter

Symbol

Input Capacitance

CIN

Input/Output Capacitance

CI/O

Note:

These parameters are sample tested.

Test conditions

VIN = 0 V

VOUT = 0 V

AC Test Conditions

Parameter

Conditions

Input high level

VDD – 0.2 V

Input low level

0.2 V

Input slew rate

1 V/ns

Input reference level

VDD/2

Output reference level

VDDQ/2

Output load

Fig. 1

Notes:

1. Include scope and jig capacitance.

2. Test conditions as specified with output loading as shown in Fig. 1

unless otherwise noted.

3. Device is deselected as defined by the Truth Table.

Typ. Max. Unit

4

5

pF

6

7

pF

Output Load 1

DQ

50Ω

30pF*

VDDQ/2

* Distributed Test Jig Capacitance

Rev: 1.04 10/2004

20/39

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2002, GSI Technology

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