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ML9092-02TB

LCD Driver with Key Scanner and RAM

LAPIS Semiconductor Co., Ltd. 

LAPIS Semiconductor

FEDL9092-01

ML9092-01/02/03/04

ML9092-02

Function

CPU interface

Oscillation

Control signal

Switch signal

Port output

LCD driver output

Power supply

Pin

63

64

65

66

77

78

67

79

62–59

58–53

51, 52

80

50–1

100–91

90–81

76

68

75

74, 73

72

71, 69

70

Symbol

CS

CP

DI/O

KREQ

OSC1

OSC2

Type

I

I

I/O

O

I

O

RESET

I

TEST

I

C0–C3

I

R0–R5

O

A, B

I

PA0

O

SEG1–SEG60

O

COM1–COM10

O

VDD

—

VSS

—

VIN

—

VC1+, VS1–

—

VOUT

—

V0, V2

—

NC

—

Description

Chip select signal input pin

Shift clock signal input pin. This pin is

connected to the Schmitt circuit internally.

Serial data signal I/O pin. This pin is

connected to the Schmitt circuit internally.

Key scan read and rotary encoder read

READY signal output pin.

Connect external resistors with this pin.

This pin is connected to the Schmitt circuit

internally.

If using an external clock, input it from the

OSC1 pin and leave the OSC2 pin open.

Reset input. Initial settings can be

established by applying a “L” level to this

pin. This pin is connected to the Schmitt

circuit internally.

Test input pin. This pin is connected to the

VSS pin.

Input pins that detect status of key

switches. These pins are connected to the

Schmitt circuit internally.

Key switch scan signal output pins

Rotary encoder signal input pins.

These pins are connected to the Schmitt

circuit internally.

Port A output pin

LCD segment driver output pins

LCD common driver output pins

Logic power supply pin

GND pin

Voltage doubler reference voltage input

pin

Pins to connect a capacitor for voltage

doubler

Voltage doubler output pin

LCD bias pins

Should be left open.

12/66

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