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SY88973BL

3.3V 3.2Gbps CML Low Power Limiting Post Amplifier with TTL LOS

Micrel 

Micrel, Inc.

Pin Configuration

SY88973BL

16-pin QFN

Pin Description

Pin Number

(QFN)

15

Pin Name

/EN

1, 4

DIN, /DIN

6

REF

14

LOSLVL

2, 3, 10, 11

Exposed Pad

7

GND

LOS

9, 12

5, 8, 13, 16

DOUT,

/DOUT

VCC

Type

Pin Function

TTL Input: Default

is high.

Differential Data

Input

Input: Default is

maximum

sensitivity

Ground

Open Collector TTL

Output

Differential CML

Output

Power Supply

Enable: De-asserts true data output when high. Incorporates 25k Ω pull-up to

VCC.

Differential data input. Each pin internally terminates to REF through 50 Ω.

Reference Voltage: Bypass with 0.01µF low ESR capacitor from REF to VCC

to stabilize LOSLVL and REF.

Loss-of-Signal Level Set: A resistor from this pin to VCC sets the threshold for

the data input amplitude at which the LOS output will be asserted.

Device ground. Exposed pad must be soldered (or equivalent) to the same

potential as the ground pins.

Loss-of-Signal: asserts high when the data input amplitude falls below the

threshold set by LOSLVL. For proper operation, connect an external 4.75k Ω

to 10kΩ pull-up resistor between this pin and Vcc.

Differential data output.

Positive power supply. Bypass with 0.1µF|| 0.01µF low ESR capacitors.

0.01µF capacitors should be as close as possible to VCC pins.

February 2007

3

M9999-020207-A

hbwhelp@micrel.com or (408) 955-1690

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