ICSSSTV16857CL-T Ver la hoja de datos (PDF) - Integrated Circuit Systems

Número de pieza

componentes Descripción

Lista de partido

ICSSSTV16857CL-T

DDR 14-Bit Registered Buffer

Integrated Circuit Systems 

ICSSSTV16857C

Absolute Maximum Ratings

Storage Temperature . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 3.6V

Input Voltage1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to VDD +0.5

Output Voltage1,2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to VDDQ +0.5

Input Clamp Current . . . . . . . . . . . . . . . . . . . . ±50 mA

Output Clamp Current . . . . . . . . . . . . . . . . . . . ±50 mA

Continuous Output Current . . . . . . . . . . . . . . . ±50 mA

VDD, VDDQ or GND Current/Pin . . . . . . . . . . . . ±100 mA

Package Thermal Impedance3 . . . . . . . . . . . . . . . . 55°C/W

Notes:

1. The input and output negative voltage

ratings may be excluded if the input

and output clamp ratings are observed.

2. This current will flow only when the

output is in the high state level

V0 >VDDQ.

3. The package thermal impedance is

calculated in accordance with

JESD 51.

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.These ratings

are stress specifications only and functional operation of the device at these or any other conditions above those listed in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may affect product reliability.

Recommended Operating Conditions

PARAMETER

DESCRIPTION

VDD

VDDQ

VREF

VTT

VI

VIH (DC)

VIH (AC)

VIL (DC)

VIL (DC)

VIH

VIL

VICR

VID

VIX

Supply Voltage

I/O Supply Voltage

Reference Voltage

Termination Voltage

Input Voltage

DC Input High Voltage

AC Input High Voltage

DC Input Low Voltage

Data Inputs

AC Input Low Voltage

Input High Voltage Level

Input Low Voltage Level

RESET#

Common mode Input Range CLK, CLK#

Differential Input Voltage

Cross Point Voltage of Differential Clock

Pair

IOH

High-Level Output Current

IOL

Low-Level Output Current

TA

Operating Free-Air Temperature

1Guarenteed by design, not 100% tested in production.

MIN

2.3

2.3

1.15

VREF - 0.04

0

VREF + 0.15

VREF + 0.31

1.7

0.97

0.36

(VDDQ/2) - 0.2

0

TYP

2.5

2.5

1.25

VREF

MAX

2.7

2.7

1.35

VREF + 0.04

VDDQ

UNITS

VREF - 0.15

V

VREF - 0.31

0.7

1.53

(VDDQ/2) + 0.2

-20

mA

20

70

°C

0002F—10/25/02

3

Share Link: