VMMK-2503-BLKG Ver la hoja de datos (PDF) - Avago Technologies
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VMMK-2503-BLKG Datasheet PDF : 11 Pages
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VMMK-2503 Application and Usage
(Please always refer to the latest Application Note AN5378 in website)
Biasing and Operation
The VMMK-2503 is normally biased with a positive drain
supply connected to the output pin through an external
bias-tee and with bypass capacitors as shown in Figure
19. The recommended drain supply voltage is 5 V and the
corresponding drain current is approximately 65mA. The
input of the VMMK-2503 is AC coupled and a DC-blocking
capacitor is not required. Aspects of the amplifier perfor-
mance may be improved over a narrower bandwidth by
application of additional conjugate, linearity, or low noise
(Γopt) matching.
Vdd
Size: 1.1 mm x 0.6 mm (0402 component)
0.1 uF
100 pF
Input
Input
Pad
50 Ohm line
Amp
Ground
Pad
Output
Output
Pad
Bias-Tee
50 Ohm line
Figure 19. Usage of the VMMK-2503
Biasing the device at 5V compared to 4V results in higher
gain, higher IP3 and P1dB. In a typical application, the bias-
tee can be constructed using lumped elements. The value
of the output inductor can have a major effect on both
low and high frequency operation. The demo board uses
an 10nH inductor that has self resonant frequency higher
than the maximum desired frequency of operation. At
frequencies higher than 6GHz, it may be advantageous to
use a quarter-wave long micro-strip line to act as a high-
impedance at the desired frequency of operation. This
technique proves a good solution but only over relatively
narrow bandwidths.
Another approach for broadbanding the VMMK-2503 is
to series two different value inductors with the smaller
value inductor placed closest to the device and favoring
the higher frequencies. The larger value inductor will then
offer better low frequency performance by not loading
the output of the device. The parallel combination of the
100pF and 0.1uF capacitors provide a low impedance
in the band of operation and at lower frequencies and
should be placed as close as possible to the inductor. The
low frequency bypass provides good rejection of power
supply noise and also provides a low impedance termi-
nation for third order low frequency mixing products
that will be generated when multiple in-band signals are
injected into any amplifier.
Figure 20. Evaluation/Test Board (available to qualified customer request)
Vdd
0.1 uF
100 pF
Size: 1.1 mm x 0.6 mm (0402 component)
Input
Input
Pad
Amp
Ground
Pad
Output
Pad
10 nH
Output
100 pF
50 Ohm line
50 Ohm line
Figure 21. Example application of VMMK-2503 at 5.8GHz
Refer the Absolute Maximum Ratings table for allowed DC
and thermal conditions.
S Parameter Measurements
The S-parameters are measured on a .016 inch thick
RO4003 printed circuit test board, using G-S-G (ground
signal ground) probes. Coplanar waveguide is used to
provide a smooth transition from the probes to the device
under test. The presence of the ground plane on top of
the test board results in excellent grounding at the device
under test. A combination of SOLT (Short - Open - Load
- Thru) and TRL (Thru - Reflect - Line) calibration tech-
niques are used to correct for the effects of the test board,
resulting in accurate device S-parameters. The reference
plane for the S Parameters is at the edge of the package.
The product consistency distribution charts shown on
page 2 represent data taken by the production wafer probe
station using a 300um G-S wafer probe. The ground-signal
probing that is used in production allows the device to be
probed directly at the device with minimal common lead
inductance to ground. Therefore there will be a slight dif-
ference in the nominal gain obtained at the test frequency
using the 300um G-S wafer probe versus the 300um G-S-G
printed circuit board substrate method.
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