ISL8540 Ver la hoja de datos (PDF) - Renesas Electronics

Número de pieza

componentes Descripción

Lista de partido

ISL8540

DC/DC Power Switching Regulator

Renesas Electronics 

ISL8540

Electrical Specifications

Unless otherwise specified the specifications listed in the table are tested at TA = +25°C and guard band for the

full Temperature Range, VIN = 24V, VOUT = 5.0V, IOUT = 0A. Typical values are at TA = +25°C. Parameters

with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits

established by characterization and are not production tested. (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN TYP MAX UNITS

THERMAL SHUT-DOWN

Thermal Shut-down Temperature

Rising Threshold

150

°C

Thermal Shut-down Hysteresis

15

°C

Pin Descriptions

VIN (Pins 1, 2, 19, 20)

The input supply for the PWM regulator power stage.

Connected to DRAIN of the high side MOSFET.

LX (Pins 3, 4, 17, 18)

There are four output pins that must be connected together

externally in normal operation.

BOOT (Pin 5)

A capacitor is connected from this pin to the output pin. An

internal 10V supply and an internal Schottky diode provide

the high side voltage to drive the gate of the internal DMOS

device.

EN (Pin 6)

The EN input will disable the part and shut-down all function

when it is held high or left OPEN. The EN current will be

10µA typical. An internal pull-up resistor will hold the pin

high. When EN = Low, the part is enabled. Connect to GND

for auto start-up.

VCC5 (Pin 7)

VCC5 is the +5.0V output pin which provides an output of an

internal supply for supply filtering purposes. A 1µF capacitor

should be connected from this pin to GND. Internal VDD

supply is set at 5.0V (not planned that the user would use

this supply).

SYNC (Pin 8)

This pin provides a digital input pin to synchronize the

internal oscillator to an external signal. When the sync

function is not used, this pin can be left open or tied to GND.

If the sync function is used, the RTCT timing must be set to a

frequency lower than the sync input frequency. The

termination of the ramp is synchronized with the rising edge

of the sync input signal. There are no duty cycle restrictions

on the input sync signal. Input thresholds are TTL

compatible.

RTCT (Pin 9)

A resistor to VIN and a capacitor to GND determine the

frequency of the saw-tooth oscillator. Resistor range is

R = 20k to 100k. Capacitor range is C = 470pF to 1.2nF. The

oscillator amplitude will vary from approximately 0.9V to 10V

as VIN changes from 8.5V to 40V to maintain constant

frequency and provide feed forward. The oscillator will have

a fixed off time, which will establish the maximum on time for

the regulator. This off time will be <200ns. The maximum

duty cycle for a 500kHz system will therefore be

approximately 90%, as the frequency of the maximum duty

cycle will increase (95% for 250kHz system). The minimum

duty cycle is zero.

SGND (Pin 10)

The SGND terminal of the ISL8540 provides the return path

for the control and monitor portions of the IC.

FB (Pin 11)

This is the feedback pin. The feedback ratio is set by an

external resistor divider connected to the load.

COMP (Pin 12)

This pin is connected to the output of the Error Amplifier and

is used to compensate the loop. The Error Amplifier is a GM

amplifier.

REF (Pin 13)

1.20V reference output. Bypass to GND with 1µF capacitor.

PGOOD (Pin 14)

This pin is an open drain output that is turned on when the

feedback voltage is more than ±10% from the reference

voltage, indicating that the output is not within 10% of set

point.

PGND (Pin 15)

This pins are used as the ground connection of the power

train.

SS (Pin 16)

A capacitor is connected from this pin to GND to determine

the soft-start timing. The soft-start pin internal charging

current is 10µA.

FN6495 Rev 5.00

September 9, 2008

Page 4 of 17

Share Link: