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MPC941

Low Voltage, 1:27 Clock Distribution Chip

Integrated Device Technology 

Low Voltage, 1:27 Clock Distribution Chip

MPC941

DATA SHEET

The MPC941 is a 1:27 low voltage clock distribution chip. The device features

the capability to select either a differential LVPECL or an LVCMOS compatible

input. The 27 outputs are LVCMOS compatible and feature the drive strength to

drive 50  series or parallel terminated transmission lines. With output-to-output

skews of 250 ps, the MPC941 is ideal as a clock distribution chip for the most

demanding of synchronous systems. For a similar product with a smaller number

of outputs, please consult the MPC940 data sheet.

• LVPECL or LVCMOS Clock Input

• 250 ps Maximum Output-to-Output Skew

• Drives Up to 54 Independent Clock Lines

• Maximum Output Frequency of 250 MHz

• High Impedance Output Enable

• Extended Temperature Range: –40C to +85C

• 48-Lead LQFP Packaging, Pb-free

• 3.3 V or 2.5 V VCC Supply Voltage

LOW VOLTAGE 3.3 V/2.5 V

1:27 CLOCK

DISTRIBUTION CHIP

SCALE 2:1

AE SUFFIX

48-LEAD LQFP PACKAGE

Pb-FREE PACKAGE

CASE 932-03

With a low output impedance, in both the HIGH and LOW logic states, the

output buffers of the MPC941 are ideal for driving series terminated transmission

lines. More specifically, each of the 27 MPC941 outputs can drive two series

terminated 50  transmission lines. With this capability, the MPC941 has an effective fanout of 1:54. With this level of fanout, the

MPC941 provides enough copies of low skew clocks for most high performance synchronous systems.

The differential LVPECL inputs of the MPC941 allow the device to interface directly with an LVPECL fanout buffer like the

MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS input provides a

more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In addition,

the two clock sources can be used as a test clock interface as well as the primary system clock. A logic HIGH on the

LVCMOS_CLK_Sel pin will select the LVCMOS level clock input.

The MPC941 is fully 3.3 V and 2.5 V compatible. The 48-lead LQFP package was chosen to optimize performance, board

space and cost of the device. The 48-lead LQFP has a 7x7 mm body size.

MPC941 REVISION 10 3/18/15

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©2015 Integrated Device Technology, Inc.

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