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ICS9248F-66

Frequency Timing Generator for PENTIUM II Systems

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS9248-66

Advance Information

Frequency Timing Generator for PENTIUM II Systems

Features

• Generates the following system clocks:

- 3 CPU clocks ( 2.5V, 100/133MHz)

- 8 PCI clocks, including 1 free-running (3.3V, 33MHz)

- 1 CPU/2 clocks (2.5V, 50/66MHz)

- 1 IOAPIC clocks (2.5V, 16.67MHz)

- 3 Fixed frequency 66MHz clocks(3.3V, 66MHz)

- 2 REF clocks(3.3V, 14.318MHz)

- 1 USB clock (3.3V, 48MHz)

• Efficient power management through PD#, CPU_STOP#

and PCI_STOP#.

• 0 to -0.5% typical down spread modulation on CPU,

PCI, IOAPIC, 3V66 and CPU/2 output clocks.

• Uses external 14.318MHz crystal.

Key Specification

• CPU Output Jitter: <250ps

• CPU/2 Output Jitter. <250ps

• IOAPIC Output Jitter: <500ps

• 48MHz, 3V66, PCI Output Jitter: <500ps

• Ref Output Jitter. <1000ps

• CPU Output Skew: <175ps

• PCI Output Skew: <500ps

• 3V66 Output Skew <250ps

• CPU to 3V66 Output Offset: 0.0 - 1.5ns (CPU leads)

• 3V66 to PCI Output Offset: 1.5 - 4.0ns (3V66 leads)

• CPU to IOAPIC Output Offset 1.5 - 4.0ns (CPU leads)

Block Diagram

Pin Configuration

9248-66 Rev - 7/28/99

48-pin SSOP

ADVANCE INFORMATION documents contain information on products

in the formative or design phase development. Characteristic data and

other specifications are design goals. ICS reserves the right to change or

discontinue these products without notice.

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