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RMDA1840
Fairchild
Fairchild Semiconductor Fairchild
RMDA1840 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Application
Information
RMDA1840
18-40 GHz Broad Band Driver Amplifier
MMIC
PRODUCT INFORMATION
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
Chip carrier material should be selected to have GaAs compatible thermal coefficient of expansion and high thermal
conductivity such as copper molybdenum or copper tungsten. The chip carrier should be machined, finished flat,
plated with gold over nickel and should be capable of withstanding 325°C for 15 minutes.
Die attachment should utilize Gold/Tin (80/20) eutectic alloy solder and should avoid hydrogen environment for
PHEMT devices. Note that the backside of the chip is gold plated and is used as RF ground.
These GaAs devices should be handled with care and stored in dry nitrogen environment to prevent contamination
of bonding surfaces. These are ESD sensitive devices and should be handled with appropriate precaution including
the use of wrist grounding straps. All die attach and wire/ribbon bond equipment must be well grounded to prevent
static discharges through the device.
Recommended wire bonding uses 3 mils wide and 0.5 mil thick gold ribbon with lengths as short as practical
allowing for appropriate stress relief. The RF input and output bonds should be typically 0.012” long corresponding
to a typical 2 mil gap between the chip and the substrate material.
Recommended
Procedure
for Biasing and
Operation
CAUTION: THIS IS AN ESD SENSITIVE DEVICE.
CAUTION: LOSS OF GATE VOLTAGES (Vg) WHILE DRAIN VOLTAGES (Vd) IS PRESENT MAY DAMAGE THE
AMPLIFIER CHIP.
The following sequence of steps must be followed to properly test the amplifier.
Step 1: Turn off RF input power.
Step 5: After the bias condition is established, RF input
Step 2: Connect the DC supply grounds to the grounds
of the chip carrier. Slowly apply negative gate
signal may now be applied at the appropriate
frequency band.
bias supply voltage of -1.5 V to Vg.
Step 6: Follow turn-off sequence of:
Step 3: Slowly apply positive drain bias supply voltage
of +5 V to Vd.
Step 4: Adjust gate bias voltage to set the quiescent
current of Idq = 400 mA.
(i) Turn off RF input power,
(ii) Turn down and off drain voltage (Vd),
(iii) Turn down and off gate bias voltage (Vg).
Figure 1
Functional Block
Diagram
Drain Supply Drain Supply Drain Supply Drain Supply
Vd1
Vd2
Vd3
Vd4
RF IN
MMIC Chip
RF OUT
Ground Gate Supply Gate Supply Gate Supply Gate Supply
Back of Chip
Vg1
Vg2
Vg3
Vg4
Characteristic performance data and specifications are subject to change without notice.
Revised January 15, 2001
Page 2

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