ADBF539WBBCZ5 Ver la hoja de datos (PDF) - Analog Devices
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ADBF539WBBCZ5 Datasheet PDF : 60 Pages
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ADSP-BF539/ADSP-BF539F
TABLE OF CONTENTS
Features ................................................................. 1
Memory ................................................................ 1
Peripherals ............................................................. 1
General Description ................................................. 3
Low Power Architecture ......................................... 3
System Integration ................................................ 3
ADSP-BF539/ADSP-BF539F Processor Peripherals ....... 3
Blackfin Processor Core .......................................... 4
Memory Architecture ............................................ 5
DMA Controllers .................................................. 8
Real-Time Clock ................................................... 9
Watchdog Timer .................................................. 9
Timers ............................................................... 9
Serial Ports (SPORTs) .......................................... 10
Serial Peripheral Interface (SPI) Ports ...................... 10
2-Wire Interface ................................................. 10
UART Ports ...................................................... 10
Programmable I/O Pins ........................................ 11
Parallel Peripheral Interface ................................... 12
Controller Area Network (CAN) Interface ................ 12
Media Transceiver MAC layer (MXVR) ................... 13
Dynamic Power Management ................................ 13
Voltage Regulation .............................................. 15
Clock Signals ..................................................... 15
REVISION HISTORY
10/13—Rev. E to Rev. F
Updated Development Tools .................................... 17
Added notes to Table 32 in
Serial Ports—Enable and Three-State .......................... 43
Added Timer Clock Timing ...................................... 48
Revised Timer Cycle Timing ..................................... 48
To view product/process change notifications (PCNs) related to
this data sheet revision, please visit the processor’s product page
on the www.analog.com website and use the View PCN link.
Booting Modes ................................................... 16
Instruction Set Description .................................... 17
Development Tools .............................................. 17
Example Connections and Layout Considerations ....... 18
MXVR Board Layout Guidelines ............................. 18
Voltage Regulator Layout Guidelines ....................... 19
Additional Information ........................................ 20
Related Signal Chains ........................................... 20
Pin Descriptions .................................................... 21
Specifications ........................................................ 26
Operating Conditions ........................................... 26
Electrical Characteristics ....................................... 27
Absolute Maximum Ratings ................................... 30
ESD Sensitivity ................................................... 30
Package Information ............................................ 30
Timing Specifications ........................................... 31
Output Drive Currents ......................................... 50
Test Conditions .................................................. 52
Thermal Characteristics ........................................ 55
316-Ball CSP_BGA Ball Assignment ........................... 56
Outline Dimensions ................................................ 59
Surface-Mount Design .......................................... 59
Ordering Guide ..................................................... 60
Rev. F | Page 2 of 60 | October 2013
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