EVAL-ADM1068LQEB Ver la hoja de datos (PDF) - Analog Devices
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EVAL-ADM1068LQEB Datasheet PDF : 28 Pages
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Preliminary Technical Data
GENERAL DESCRIPTION
(continued from Page 1)
The device provides up to eight programmable inputs for
monitoring under, over, or out-of-window faults on up to eight
supplies. In addition, eight programmable outputs can be used
as logic enables. Six of them can also provide up to a 12 V
output for driving the gate of an N-channel FET, which can be
placed in the path of a supply.
ADM1068
The logical core of the device is a sequencing engine. This state-
machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs,
based on the condition of the inputs.
The device is controlled via configuration data that can be
programmed into an EEPROM. The whole configuration can be
programmed using an intuitive GUI-based software package
provided by ADI.
10µF
REFOUT
REFGND SDA SCL A1 A0
ADM1068
VREF
SMBus
INTERFACE
DEVICE
CONTROLLER
OSC
EEPROM
GPI SIGNAL
CONDITIONING
VX1
SFD
VX2
VX3
VX4
VP1
VP2
VP3
VH
AGND
VDDCAP
10µF
GPI SIGNAL
CONDITIONING
SFD
SELECTABLE
ATTENUATOR
SFD
SELECTABLE
ATTENUATOR
SFD
VDD
ARBITRATOR
REG 5.25V
CHARGE PUMP
CONFIGURABLE
O/P DRIVER
(HV)
SEQUENCING
ENGINE
CONFIGURABLE
O/P DRIVER
(HV)
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
CONFIGURABLE
O/P DRIVER
(LV)
PDO7
CONFIGURABLE
O/P DRIVER
(LV)
PDO8
PDOGND
GND
VCCP
10µF
Figure 2. Detailed Block Diagram
Rev. PrB | Page 3 of 28
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