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BR24G64XXX-5

Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire)

ROHM Semiconductor 

BR24G64xxx-5 Series

4. ECC Function

This IC has ECC bits for Error Correction every 4 bytes with the same address bits of WA12 to WA2. In read operation,

if 1 bit of error data exists in 4 bytes, this error data will be corrected by the ECC function and outputs the correct data.

In write operation, only 1 byte of data is to be written, 4 bytes of data will be written as one group with the same

address bits of WA12 to WA2 (the data to be written in the remaining 3 bytes will be the same as its previous stored

data). Therefore, the number of write cycle times is guaranteed every 4 bytes with the same address bits of WA12 to

WA2.

Initial Delivery State

Address

0000h 0001h

0002h

0003h

0004h

0005h

···

Number of remaining

write cycles

4 Million 4 Million 4 Million 4 Million 4 Million 4 Million

Times

Times

Times

Times

Times

Times

···

After 1 Million Times using Byte Write in Address 0000h

Address

0000h 0001h

0002h

0003h

0004h

0005h

···

Number of remaining

write cycles

3 Million 3 Million 3 Million 3 Million 4 Million 4 Million

Times

Times

Times

Times

Times

Times

···

Even if only 1 byte of data is to be written in address 0000h,

the addresses 0000h to 0003h are written as one group.

Therefore, the number of write cycle times at addresses 0001h to

0003h decreases.

Figure 43. Example of data write and number of remaining write cycles

Read Command

Read the EEPROM data. Read has a random read and a current read functions. Random read is commonly used in

commands that specify addresses and read data. The current read is a command to read data of the internal address

register without specifying an address. In both read functions, sequential read is possible where the next address data

can be read in succession.

SLAVE

1st WORD

START ADDRESS WRITE ADDRESS（ｎ）

2nd WORD

SLAVE

ADDRESS（ｎ） START ADDRESS READ

DATA(n)

STOP

SDA

LINE

1 0 1 0 A2A1A0

WAWA

* * * 12 11

00

R/W ACK

ACK

WA

0

1 0 1 0 A2A1A0

D7

00

ACK

R/W ACK

D0

ACK

* Don’t Care bit

Figure 44. Random Read

SLAVE

START ADDRESS READ

SDA

LINE

1 0 1 0 A2A1A0

D7

0

R/W ACK

DATA(n)

STOP

D0

ACK

Figure 45. Current Read

SLAVE

START ADDRESS READ

SDA

LINE

1 0 1 0 A2 A1A0

D7

00

R/W ACK

DATA(n)

D0

ACK

DATA(n+x)

STOP

D7

ACK

D0

ACK

Figure 46. Sequential Read (in the Case of Current Read)

(1) In random read, data of designated word address can be read.

(2) When the command just before current read is random read or current read (each including sequential read), if last

read address is (n)-th, data of the incremented address (n+1)-th is outputted.

(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (microcontroller) side, the

next address data can be read in succession.

(4) Read is ended by stop condition where 'HIGH' is input to ACK signal after D0 and SDA signal goes from 'LOW' to

'HIGH' while at SCL signal is 'HIGH'.

(5) When 'LOW' is input at ACK signal after D0 without 'HIGH' input, sequential read gets in, and the next data is

outputted. Therefore, read command cannot be ended. To end read command, be sure to input 'HIGH' to ACK

signal after D0, and the stop condition where SDA goes from 'LOW' to 'HIGH' while SCL signal is 'HIGH'.

(6) Sequential read is ended by stop condition where 'HIGH' is input to ACK signal after arbitrary D0 and SDA goes

from 'LOW' to 'HIGH' while SCL signal is 'HIGH'.

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TSZ02201-0GGG0G100910-1-2

05.Jun.2020 Rev.003

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