BR24T128FVJ-W Ver la hoja de datos (PDF) - ROHM Semiconductor

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BR24T128FVJ-W

Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire)

ROHM Semiconductor 

BR24T128-W

Block Diagram

A0 1

A1 2

128Kbit EEPROM Array

Address

Decoder

Word

14bit Address Register

8bit

Data

Register

A2 3

GND 4

START

Control Circuit

STOP

ACK

High Voltage

Generating Circuit

Power Source

Voltage Detection

8 VCC

7 WP

6 SCL

5 SDA

Figure 3. Block Diagram

Datasheet

Pin Configuration

(TOP VIEW)

A0

1

A1

2

A2

3

BR24T128-W

GND 4

8 VCC

7 WP

6 SCL

5 SDA

Pin Descriptions

Terminal Input/

Name Output

Descriptions

A0

Input Slave address setting*

A1

Input Slave address setting*

A2

Input Slave address setting*

GND

SDA

- Reference voltage of all input / output, 0V

Input/

Output

Serial data input serial data output

SCL Input Serial clock input

WP

Input Write protect terminal

VCC

- Connect the power source.

*A0, A1 and A2 are not allowed to use as open.

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TSZ02201-0R2R0G100130-1-2

31.May.2013 Rev.003

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