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AAT4620

PCMCIA Current Limit Interface and Capacitor Charger

Advanced Analogic Technologies 

nal resistors connected between the two SET pins

and ground. The minimum current limit threshold is

specified by ILIM(MIN). If the load condition maintains

the device in current limit and the chip temperature

reaches a critical point, then an internal power loop

will reduce the current to a safe level. Connecting

ISETU to ground disables the current limit protec-

tion allowing a low impedance path to the host VCC.

The load switch is turned off by applying a logic

high level to both of the EN pins. When both EN IL

and EN IU are selected ISETU will be selected.

The EN function has logic level thresholds that

allow the AAT4620 to be TTL compatible and may

also be controlled by 2.5V to 5.0V CMOS circuits.

The voltage level applied to the EN pins should not

exceed the input supply level present on the VCC

pin. The AAT4620 typically consumes 40µA when

operating, when off, the device draws less then

1µA. In the off state, current is prevented from flow-

ing between the input and output.

Under-voltage lockout circuitry ensures that the

VCC supply is high enough for correct operation of

the IC. Also included is a System Ready function

which will be activated when the capacitor voltage

is charged and the load is permitted to take current.

For automatic functionality, this pin can be directly

connected to the EN IU pin. An external resistor is

provided to add hysteresis to this function.

AAT4620

PCMCIA Current Limit Interface

and Capacitor Charger

Application Information

ISETU and ISETL Current Limit Set

The AAT4620 current limit is set at two different lev-

els. Resistors from ISETL and ISETU set the lower

and upper current limit levels respectively.

The ISETL and ISETU nodes operate within a win-

dow of 0.75V to 1.5V for resistor values ranging from

93.75Ω to 1.5MΩ. Resistor values outside this range

are not recommended. The ISETL and ISETU

source current varies with the resistor value used

according to Table 1. To determine the resulting cur-

rent limit multiply the RSETU or RSETL node voltage

times the gain in Table 1. Note that the voltage at the

node varies from 0.75V to 1.5V and the current limit

gain varies depending on the resistor value used.

VISET = RSET · IISET = 0.75V to 1.5V

If the set pin is open circuit or allowed to exceed

2V, all power devices are disabled and the input is

disconnected from the output. Shorting the set pin

to GND enables all power devices and shorts the

VCC to the output pin with no current limit.

To activate the upper current level (RSETU) pull EN IU

low. To activate the lower current level (RSETL) pull

EN IL low. If both EN IU and EN IL are pulled low the

EN IU current limit level (RSETU) will be selected.

RSET Range

1.5Meg - 750k

750k - 375k

375k - 187.5k

187.5 - 93.75k

IISET (µA)

1

2

4

8

ILIM/VISET (A/V)

0.8

0.4

0.2

0.1

Current Limit Range (A)

1.2-0.6

0.6-0.3

0.3-0.15

0.15-0.075

Table 1: RSET Table.

Current Limit

RSET*1µA*0.8

RSET*2µA*0.4

RSET*4µA*0.2

RSET*8µA*0.1

10

4620.2007.04.1.1

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