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CS5180-CL

∆Σ Modulator & 8 kHz to 400 kHz 16-Bit ADC

Cirrus Logic 

CS5180

VS

+

10 µF

0.1 µF

2.5 V

+

10 µF

0.1 µF

10 µF +

0.1 µF

VREFIN

VREF+

VREF-

CS5180

X1.6

Modulator

VREFOUT

X1

+

10 µF

0.1 µF

+

1 µF

VREFCAP

0.1 µF

Reference

Figure 4. CS5180 connection diagram for using an external voltage reference.

Alternatively, the CS5180 can be configured to use

an external voltage reference. Figure 4 illustrates

the CS5180 connected to use a 2.5 V external ref-

erence. In this case, the peak-to-peak input at the

AIN pins is 4 V.

Analog Input

The analog signal to the converter is input into the

AIN+ and AIN- pins. The input signal is fully dif-

ferential with the maximum peak-to-peak ampli-

tude of VREFIN X 1.6 V. The signal needs to have

a common mode voltage in a range from 1 V to

VREF + 0.25 V. A resistor-capacitor filter should

be included on the AIN+ and AIN- inputs of the

converter. This should consist of a 20 Ω resistor

and a 2200 pF capacitor on each input to ground as

illustrated in the system connection diagram (Fig-

ure ).

Output Coding

Table 1 illustrates the output coding for the con-

verter when operating with the digital filter

(MODE = 1). The converter outputs its data from

the serial port in twos complement format, MSB

first.

Fully Differential Bipolar

Input Voltage1

>(VFS - 1.5 LSB)

VFS - 1.5 LSB

-0.5 LSB

-VFS + 0.5 LSB

<(-VFS + 0.5 LSB)

Twos Complement

7FFF

7FFF

7FFE

0000

FFFF

8001

8000

8000

Notes: 1. VFS = VREFIN x 1.6

Table 1. Output Coding.

The chip offers an MFLAG signal to indicate when

the modulator has gone unstable. MFLAG is set

when an overrange signal forces the modulator into

an unstable condition. Under this condition, output

codes from the converter will be locked to either

plus or minus full scale as is appropriate for the

overrange condition.

Modulator-Only mode

The CS5180 can be operated in modulator-only

mode by connecting the MODE pin to a logic 0

(DGND).

In modulator-only mode the noise-shaped bit-

stream from the fifth-order delta-sigma modulator

is output from the SDO and SDO (inverse bit-

stream) pins.

11

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