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SC1402ISS Datasheet PDF : 18 Pages
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Multi-Output, Low-Noise Power Supply
Controller for Notebook Computers
SC1402
December 15, 2000
PIN DESCRIPTION
Pin # Pin Name
1
CSH3
2
CSL3
3
FB3
4
12 OUT
5
VDD
6
SYNC
7 TIME/ON5
8
GND
Pin Function
Current Sense Input for the 3.3V SMPS. Current limit level is 100mV referred to CSL3.
Current Sense Input. Also serves as the feedback input in fixed output mode.
Feedback Input for the 3.3V SMPS; Connect FB3 to a resistor divider for adjustable output mode and
FB3 is regulated to REF (approx. 2.5V). FB3 selects the 3.3V fixed output voltage setting when tied to
GND.
12V, 120mA Linear Regulator Output. Input supply comes from VDD. Bypass 12 OUT to GND with 1µF
minimum capacitor.
Supply Voltage Input for the 12 OUT Linear Regulator. Also connects to a 18V overvoltage shunt
regulator clamp.
Oscillator Synchronization and Frequency Select. Tie to VL for 300kHz operation; tie to GND for
200kHz. Driven externally to SYNC between 240kHz and 350kHz.
Dual Purpose Timing Capacitor Pin and 5V SMPS ON/OFF Control Input. Input resistor of 1K is
required when using ON/OFF control input.
Low noise Analog Ground and Feedback reference point.
9
REF
2.5V Reference Voltage Output. Bypass to GND with 1µF minimum capacitor.
10
PSAVE Logic Control Input that disables PSAVE Mode when high. Connect to GND for power save mode.
11
RESET Active Low Timed Output. RESET swings from GND to VL. Goes high after 32,000 clock cycle delay
following power up as a power good signal.
12
FB5
Feedback Input for 5V SMPS; Connect FB5 to a resistor divider for adjustable output mode and FB5
regulates to REF (approx. 2.5V). FB5 selects the 5V fixed output voltage setting when tied to GND.
13
CSL5 Current Sense Input for 5V SMPS.
14
CSH5 Current Sense Input for 5V SMPS.
15
SEQ Input that selects SMPS power up sequence.
16
DH5
Gate Drive Output for the 5V, high side N-Channel MOSFET.
17 PHASE5 Switching Node inductor connection.
18
BST5 Boost capacitor connection for 5V, SMPS high-side gate drive. Connect a 0.1µF capacitor.
19
DL5
Gate Drive Output for the 5V, SMPS low-side N-Channel MOSFET.
20
PGND Power Ground.
21
VL
5V, Internal Linear Regulator Output.
22
V+
Battery Voltage Input.
23
SHDN Shutdown Control Input, active low.
24
DL3
Gate Drive Output for the 3.3V, SMPS low-side N-Channel MOSFET.
25
BST3 Boost Capacitor Connection for high side gate drive. Connect a 0.1µF capacitor.
26 PHASE3 Switching Node inductor Connection.
27
DH3
Gate Drive Output for the 3.3V, high-side N-Channel MOSFET.
28 RUN/ON3 ON/OFF Control Input of 3.3V SMPS.
Note: All logic level inputs and outputs are open collector TTL compatible.
© 2000 SEMTECH CORP.
7
652 MITCHELL ROAD NEWBURY PARK CA 91320

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