MK2716S Ver la hoja de datos (PDF) - Integrated Circuit Systems
Número de pieza
componentes Descripción
Lista de partido
MK2716S Datasheet PDF : 4 Pages
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I CR O C LOC K
Pin Assignment
ICLK/X1
VDD
GND
CLK
1
8
2
7
3
6
4
5
8 pin SOIC
X2
27M
SEL
GND
MK2716
HDTV Clock Synthesizer
Frequency Select Table (MHz)
SEL CLK
0 74.17582418
1
74.25
Pin Descriptions
Number
1
2
3
4
5
6
7
8
Name
ICLK/X1
VDD
GND
CLK
GND
SEL
27M
X2
Type Description
XI Input clock connection. Connect to a 27 MHz clock input or 27 MHz fundamental crystal.
P Connect to +3.3V or +5V.
P Connect to ground.
O 74.17582418 MHz or 74.25 MHz clock output (see table above).
P Connect to ground.
I Select pin determines value of CLK per table above.
O 27 MHz buffered clock or crystal oscillator output.
XO Connect to 27 MHz crystal, or leave unconnected for clock input.
Type: I = Input; O = output; P = power supply connection; XI, XO = crystal connections
Decoupling and External Components
The MK2716 requires a 0.1µF decoupling capacitor to be connected between VDD and GND on pins 2
and 3. It must be connected close to the MK2716. Pin 5 can be connected to pin 3. A 33 Ω terminating
resistor should be placed close to pin 4, and pin 7. If using a crystal input, it should be a 27.00 MHz,
parallel resonant, fundamental mode, with load (correlation) capacitance of 18 pF. If the crystal has a load
capacitance of 20 pF, connect 4 pF capacitors from X1 and X2 to ground.
MDS 2716 B
2
Revision 062599
Printed 11/16/00
MicroClock Division of ICS • 525 Race Street • San Jose • CA • 95126•(408)295-9800tel•(408)295-9818fax
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