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IDT77905C

NICStAR™ Reference Design 155Mbps Network Interface Card (NIC)

Integrated Device Technology 

IDT77904C/D/77905C/D

NICStAR™ Reference Design

ADVANCED INFORMATION

Commercial Temperature Range

The last two buses on the NICStAR™ are the UTOPIA

transmit and receive buses. These follow the ATM Forum’s

specification of the UTOPIA interface. They run at the PHY_CLK

speed, with the NICStAR™ generating the TXCLK and RXCLK

signals to the PHY device.

The PHY device used is the IDT 77155. It has the standard

transmit and receive UTOPIA interfaces, and a non-multi-

plexed utility bus for register access. The PHY utility data bus

and address bus are connected together on the eval board;

the NICStAR™ ALE signal defines the mode of this combined

bus in a way compatible with the NICStAR™ and the 77155

SWITCHStAR™.

The 77155 reset input is driven by the NICStAR™’s

PHY_RST# input. IDT's 77155 also provides an INT# output

which is connected to the NICStAR™’s PHY_INT# input.

The 77155 transmit and receive clock reference frequency

is provided by a 19.44 MHz oscillator. This device is specified

at 10 ppm accuracy to meet the ATM Forum requirements for

155.52 Mbps operation. As with the other oscillators on the

eval board, this oscillator has a ferrite-bead power supply

filter, and a 33 Ohm source series termination resistor. End

termination is provided as part of a voltage divider network

designed to limit the input swing at the AC-coupled RRCLK

and TXCLK inputs on the 77155.

The 77155 has several control signals which are connected

to pullup and/or pulldown resistors on the eval board. Refer to

the 77155 documentation and the 77904/5 schematics for

more details. There are also several status outputs which are

not connected. One status output, RALM, goes high when any

of several different error conditions are detected by the PHY.

It is low only when a signal is present on the receive data

inputs, the 77155 is able to recover a valid clock from the

signal, and the data on the signal contains proper SONET OR

SDH frames. RALM is connected to an LED to act as a “link

detect” indicator.

77155 has a six-wire connection to the physical media

devices (PMD) which consists of three pairs of PECL-level

differential signals. One pair is transmit data, one pair is

receive data, and the last pair is signal detect, which can also

be connected as a single-ended PECL or CMOS signal. The

polarity of the connectors should be observed. The 77904/5

provides two PMD options (77904 and 77905), and includes

extensive termination circuitry with several possible configu-

rations to provide the best possible signal integrity between

the PHY and the PMD.

77904 Option

The 77904 interface is provided via a 9-pin fiber optical data

link (ODL) footprint which can be loaded with any standard 9-

pin ODL device. The 77904 is loaded with the Hewlett-

Packard HFBR-5103, which is a short-haul device for multi-

mode fiber, originally designed for FDDI. Other devices in the

HFBR-510x and -520x families should also work here, de-

pending on the application.

77905 Option

On the 77905 is a Micro Linear ML6672CH line interface

device intended for driving twisted-pair copper lines at high

data rates; it is characterized for 155 Mbps operation. Several

resistors and capacitors are provided on the 77905 to set

various line interface parameters on the ML6672CH. The line

interface side of the ML6672CH is connected to a Pulse

Engineering PE-68511 line interface transformer which is

designed for 155 Mbps operation over unshielded twisted pair

(UTP) cable. The connector used on the eval board is an

unshielded RJ-45 which must be low-profile to work in a

standard PC expansion slot. Unused pins on the RJ-45

connector go to a termination network to reduce crosstalk and

other forms of interference within the cable.

8.14

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