INTRODUCTION
The MC68HC681 dual universal asynchronous receiver/transmitter (DUART) is part of the M68000 Family of peripherals and directly interfaces to the MC68000 processor via an asynchronous bus structure. The MC68HC681 consists of these major sections:
• Internal Control Logic
• Timing Logic
• Interrupt Control Logic
• Bidirectional 8-bit Data Bus Buffer
• Two Independent Communication Channels (A and B)
• 6-bit Parallel Input Port
• 8-bit Parallel Output Port
The MC68HC2681 dual asynchronous receiver/transmitter (DUART) is functionally equivalent to the MC68HC681 with some minor differences. The description of the MC68HC681 applies to the MC68HC2681 except for the areas described in Appendix A MC68HC2681 located in the back of this document.
Figure 1-1 is a basic block diagram of the MC68HC681 and should be referred to during the discussion of its features, which include the following:
• M68000 Bus Compatible
• Two Independent Full-Duplex Asynchronous Receiver/Transmitter Channels
• Maximum Data Transfer Rate:
— 1X — 1 Mbits/second
— 16X — 250 kbits/second
• Quadruple-Buffered Receiver Data Registers
• Double-Buffered Transmitter Data Registers
• Independently Programmable Baud Rate for Each Receiver and Transmitter Selectable From:
— 18 Fixed Rates: 50 to 38.4k Baud
— One User Defined Rate Derived from a Programmable Timer/Counter
— External 1X Clock or 16X Clock