CS61880 Ver la hoja de datos (PDF) - Cirrus Logic
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CS61880 Datasheet PDF : 70 Pages
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CS61880
3.4 Cable Select
SYMBOL
LQFP
FBGA
TYPE
DESCRIPTION
Cable Impedance Select
Host Mode - The input voltage to this pin does not effect
normal operation.
Hardware Mode - This pin is used to select the transmitted
pulse shape and set the line impedance for all eight receiv-
ers and transmitters. This pin also selects whether or not all
eight receivers use an internal or external line matching
network (Refer to the Table 4 below for proper settings).
CBLSEL
93
G13
Table 4. Cable Impedance Selection
I
CBLSEL
Transmitters
Receivers
No Connect 120 Ω Internal 120 Ω Internal or External
HIGH
75 Ω Internal
75 Ω Internal
LOW
75 Ω Internal
75 Ω External
3.5 Status
SYMBOL
LOS0
LOS1
LOS2
LOS3
LOS4
LOS5
LOS6
LOS7
NOTE: Refer to Figure 16 on page 50 and Figure 17 on
page 51 for appropriate external line matching com-
ponents. All transmitters use internal matching net-
works.
LQFP
42
35
75
68
113
106
3
140
FBGA
K4
K3
K12
K11
E11
E12
E3
E4
TYPE
O
O
O
O
O
O
O
O
DESCRIPTION
Loss of Signal Output
The LOS output pins can be configured to indicate a loss of
signal (LOS) state that is compliant to either ITU G.775 or
ETSI 300 233. These pins are asserted “High” to indicate
LOS. The LOS output returns low when an input signal is
present for the time period dictated by the associated speci-
fication (Refer to Loss-of-Signal (LOS) (See Section 10.5
on page 27)).
DS450PP2
15
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