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SM8213 Ver la hoja de datos (PDF) - Nippon Precision Circuits

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Lista de partido
SM8213
NPC
Nippon Precision Circuits  NPC
SM8213 Datasheet PDF : 33 Pages
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SM8213AM
Idle signal
In the POCSAG format, for pager systems that send
numeric data, the message information content var-
ies and as a result an idle signal or another address
signal is inserted after the message to indicate the
end of the message.
That is, if no address word or message word exists
for a frame within a batch or for a code word within
a frame, the idle pattern, shown in table 3, is trans-
Table 3. Idle code format
Bit number
1
2
3
4
5
6
7
8
Bit value
0
1
1
1
1
0
1
0
Bit number
9
10
11
12
13
14
15
16
Bit value
1
0
0
0
1
0
0
1
mitted in its place. Then during message signal
reception, the message ends when the idle signal is
detected.
The SM8213AM supports 2 methods of determining
the end of message. Namely, a message ends when
either an idle signal or another address is received
(POCSAG format), or when an interrupt signal from
the CPU is received.
Bit number
17
18
19
20
21
22
23
24
Bit value
1
1
0
0
0
0
0
1
Bit number
25
26
27
28
29
30
31
32
Bit value
1
0
0
1
0
1
1
1
Receive signal duty factor
During preamble detection, the preamble pattern
(1,0) is recognized at duty factors from 25% (min) to
75% (max) of the (1,0) preamble cycle.
Error correction and detection
The SM8213AM performs error correction (or
detection) on each code word as described in table 4.
Note that there are 8 selectable error correction con-
ditions for the preamble pattern.
Table 4. Error correction
Item
Preamble Pattern Detection
Synchronization Code word
Self Address Code word
Message Code word
Description
Selectable 1 to 8 rate errors in 6 to 544 bits
Detection 2 random errors in 32 bits
Detection 2 random errors in 32 bits
1-bit and 2-bit burst errors in 31 bits
An error is deemed to have occurred when 2 or more
signal edges occur within 1-bit unit time, and a rate
error is deemed to have occurred when the number of
errors exceeds the counter value. Refer to the “Pre-
amble Mode” section for a discussion of the error
counter.
NIPPON PRECISION CIRCUITS—9

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