MC100E101FN(2003) Ver la hoja de datos (PDF) - ON Semiconductor
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MC100E101FN Datasheet PDF : 8 Pages
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MC10E101, MC100E101
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
D3a D3b D3c D3d VCCO Q3 Q3
25 24 23 22 21 20 19
D2d 26
18 Q2
D2c 27
17 Q2
D2b 28
VEE
1
D2a 2
Pinout: 28-Lead PLCC
(Top View)
16 VCC
15 Q1
14 Q1
D1d 3
13 Q0
D1c 4
12 Q0
5 6 7 8 9 10 11
D1b D1a D0d D0c D0b D0a VCCO
* All VCC and VCCO pins are tied together on the die.
Warning: All VCC, VCCO, and VEE pins must be externally
connected to Power Supply to guarantee proper operation.
LOGIC DIAGRAM
D0a
D0b
Q0
D0c
Q0
D0d
D1a
D1b
Q1
D1c
Q1
D1d
D2a
D2b
Q2
D2c
Q2
D2d
D3a
D3b
Q3
D3c
Q3
D3d
PIN DESCRIPTION
PIN
FUNCTION
D0a − D3d
Q0 − Q3, Q0 − Q3
VCC, VCCO
VEE
ECL Data Inputs
ECL Differential Outputs
Positive Supply
Negative Supply
MAXIMUM RATINGS (Note 1)
Symbol
Parameter
Condition 1
Condition 2
VCC
PECL Mode Power Supply
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
Iout
Output Current
VEE = 0 V
VEE = 0 V
VCC = 0 V
Continuous
Surge
VI VCC
VI VEE
TA
Operating Temperature Range
Tstg
Storage Temperature Range
qJA
Thermal Resistance (Junction to Ambient) 0 LFPM
500 LFPM
28 PLCC
28 PLCC
qJC
Thermal Resistance (Junction to Case)
Standard Board
Tsol
Wave Solder
<2 to 3 sec @ 248°C
1. Maximum Ratings are those values beyond which device damage may occur.
28 PLCC
Rating
8
6
−6
50
100
0 to +85
−65 to +150
63.5
43.5
22 to 26
265
Units
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C
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