M37640E8 Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC
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M37640E8 Datasheet PDF : 172 Pages
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7600 Series
M37640E8-XXXF Preliminary Specification
Mitsubishi Microcomputers
Table 1-1. Device Feature List
Parameter
Function Description
Number of basic instructions
Instruction execution time (minimum)
Clock frequency (maximum)
Clock multiplier option
Memory size
ROM
RAM
71
83ns at Φ = 12 MHz (setting Φ to less than 5MHz is NOT recommended)
Xin = 48 MHz, XCin = 5 MHz (square wave), Φ = 12 MHz
External clock Xin and XCin can be selectively divided and multiplied by X to create
system internal clock Φ
32K bytes
1K bytes
Input/Output ports
P0~P3, P5, P6,
P8
I/O 8-bit X 7 (Port 2 has a key-on wake-up feature)
P4, P7
I/O 5-bit X 2
USB Function Control
Master CPU bus interface
FIFO:
Endpoint 0: IN 16-byte OUT 16-byte
Endpoint 1: IN 512-byteOUT 800-byte
Endpoint 2: IN 32-byte OUT 32-byte
Endpoint 3: IN 16-byte OUT 16-byte
Endpoint 4: IN 16-byte OUT 16-byte
DQ(7:0), R(E), W(R/W), S0, S1, A0, IBF0, OBF0, IBF1, OBF1; total of 17 signals interface
with master CPU (Intel 8042-like interface)
Special Count Source Generator(SCSG) Baud rate synthesizer
UART X 2
7/8/9-bit character length, with CTS, RTS available
Serial I/O
8-bit clock synchronous serial I/O, supports both master and slave modes
Timers
8-bit X 3, 16-bit X 2
DMAC
2 channels, 16 address lines, support single byte or burst transfer modes
Software selectable slew rate control
Ports P0 ~ P8
Interrupts
4 external, 19 internal, 1 software, 1 system interrupts
Supply voltage
External memory expansion
Vcc = 4.15 ~ 5.25V
Memory Expansion and Microprocessor mode
External Data Memory Access (EDMA) Allows > 64 Kbyte data access for instruction LDA (indY) and STA (indY)
Device structure
CMOS
Package
Operating temperature range
80P6N
-20 to 85oC
1-4
6/2/98
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