MC33102DR2 Ver la hoja de datos (PDF) - ON Semiconductor
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componentes Descripción
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MC33102DR2 Datasheet PDF : 15 Pages
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MC33102
14
70
12
60
10
Sleep mode
50
8.0
40
Awake mode
6.0
30
4.0 VCC = +15 V
20
VEE = -15 V
2.0 VO = 0 V
10
0
0
10
100
1.0 k
10
CL, OUTPUT LOAD CAPACITANCE (pF)
Figure 25. Open Loop Gain Margin versus
Output Load Capacitance
VCC = +15 V
VEE = -15 V
VO = 0 V
Awake mode
Sleep mode
100
1.0 k
10 k
CL, OUTPUT LOAD CAPACITANCE (pF)
Figure 26. Phase Margin versus
Output Load Capacitance
70
40
1A) Phase, VS = ±18 V
2A) Phase, VS = ± 2.5 V
50
1B) Gain, VS = ±18 V 80
2B) Gain, VS = ± 2.5 V
30
1A
120
2A
10
TA = 25°C
-10 RL = 1.0 MW
CL < 10 pF
Sleep mode
-30
10 k
1B
2B
100 k
1.0 M
f, FREQUENCY (Hz)
160
200
240
10 M
Figure 27. Sleep Mode Voltage Gain and
Phase versus Frequency
70
TA = 25°C 40
RL = 600 W
50
CL < 10 pF 80
Awake mode
1A
30
120
2A
10
1B
2B
1A) Phase, VS = ±18 V
-10 2A) Phase, VS = ± 2.5 V
1B) Gain, VS = ±18 V
-30 2B) Gain, VS = ± 2.5 V
30 k
100 k
1.0 M
f, FREQUENCY (Hz)
160
200
240
10 M
Figure 28. Awake Mode Voltage Gain and
Phase versus Frequency
140
120
100
80
60
40 VCC = +15 V
20
VEE = -15 V
RL = 600 W
Awake mode
0
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
Figure 29. Channel Separation versus Frequency
100
VCC = +15 V
VEE = -15 V
10 RL = 600 W
1.0
0.1
VO = 2.0 Vpp
TA = 25°C
Awake mode
AV = +1000
AV = +100
AV = +10
0.01
AV = +1.0
0.001
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
Figure 30. Total Harmonic Distortion
versus Frequency
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