BIT3713 Ver la hoja de datos (PDF) - Unspecified
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BIT3713 Datasheet PDF : 11 Pages
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Beyond Innovation Technology Co., Ltd.
BIT3713
Pin Description:
Table 1
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
INN
CMP
LOAD
CTOSC
TIMER
ONOFF
GND
OUT1
OUT2
VDD
PWMOUT
CTPWM
PWMDC
OUTADJ
ISEN
MODSEL
I/O
Descriptions
I The inverting input of the error amplifier.
O Output of the error amplifier.
A switch that connected to the high frequency triangle wave generator.
This switch is closed while the voltage level of ISEN pin is lower than 1.3V.
I/O Once the ISEN pin has become > 1.3V, the switch keeps open no mater the
status of ISEN pin. An external resistor connected here may change the
operation frequency of CTOSC during this switch is open.
I/O
An external capacitor connected here decides the frequency of high
frequency PWM controller.
With internal reference current and an external capacitor connected here, it
decides the required period of starting and the timing of initialization. The
controller is forced to the reset mode while the voltage level of TIMER is lower
than 0.3V. During reset mode, the current about 60uA will flow into the INN
I/O pin to reduce the output level of the error amplifier CMP to turn off the
controller. The protection function will be enabled after this node is charged
to exceed 2.5V. The output current of this pin is 20uA when the level of
TIMER is lower than 0.3V. The output current becomes 1uA when the level
of TIMER is higher than 0.3V
I
The control pin of turning on or off the IC. 1V threshold with an internal 80K
15% ohm pull-low resistor.
I/O The ground pin of the device.
O The active high output driver.
O The active high output driver.
I The power supply pin of the device.
The output pin of the 2nd low frequency PWM generator. A 2.5V or floating two
O state output is provided through this pin. The internal circuit limits the max.
Duty-cycle to about 92%.
With the internal reference current and an external capacitor connected here
I/O can set the operation frequency of the 2nd low frequency PWM generator with
1.0V ~ 2.5V triangle wave output.
The 2nd Low frequency PWM controlling input. A PWM output comes out by
I comparing this DC input and the 1.0 ~ 2.5V triangle wave that is generated by
CTPWM.
Output adjustment. If a > 2.0 V voltage is detected. A ~ 60uA current will flow
I into the INN pin to adjust the output of the error amplifier pin CMP to regulate
the output voltage.
Load detection pin, the abnormal load situation is detected if a less than 1.3V
I voltage is continuously kept for 32 cycles of the 2nd low frequency PWM on
this pin.
O To set the output polarity of the 2nd low frequency PWM generator.
‘05/12/15
Preliminary
BiTEK
December 20, 2005
DCC CONTROLLED
Confidential, for authorized user only
page 4 of 11
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