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RTL8198

IEEE 802.11n GIGABIT ETHERNET AP/ROUTER NETWORK PROCESSOR

Realtek Semiconductor 

RTL8198

Datasheet

5. Pin Descriptions

In this section the following abbreviations are used:

Upon Reset: Defined as a short time after the end of a hardware reset.

After Reset: Defined as the time after the specified ‘Upon Reset’ time.

I: Input

AI: Analog Input

O: Output

AO: Analog Output

I/O: Bi-Direction Input/Output

AI/O: Analog Bi-Directional Input/Output

P: Digital Power

AP: Analog Power

G: Digital Ground

AG: Analog Ground

T/S: Tri-State Bi-Directional Input/Output

S/T/S: Sustained Tri-State

IPD: Input Pin With Pull-Down Resistor

OOD: Output With Open Drain

IPU: Input Pin With Pull-Up Resistor;

(Typical Value = 75K Ohm)

O3S: Output With Tri-State

Pin Name

25M_XI

25M_XO

40M_CLK

SEL_40M

RESET#

P0MDIAP/N

P0MDIBP/N

P0MDICP/N

P0MDIDP/N

Pin No.

12

13

14

15

5

55

56

58

59

61

62

63

64

Table 1. Pin Descriptions

R.P Type Description

Clock & Reset

I 25MHz Crystal Clock Input.

O 25MHz Crystal Clock Output.

I 40MHz Clock Input.

Input voltage level 1.8V

I Select 40M or 25M Clock Source.

0: Use 25MHz clock

1: Use 40MHz clock

I External Reset.

Gigabit Ethernet Physical Layer

AI/O

Port0 Media Dependent Interface A~D. For 1000Base-T

operation, differential data from the media is transmitted and

received on all four pairs. For 100Base-Tx and 10Base-T

operation, only MDIAP/N and MDIBP/N are used. Auto

MDIX can reverse the pairs MDIAP/N and MDIBP/N.

Each of the differential pairs has an internal 100 ohm

termination resistor.

IEEE 802.11n Gigabit Ethernet AP/Router Network Processor

7

Track ID: JATR-2265-11 Rev. 0.91

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