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DM9102AE

Single Chip Fast Ethernet NIC Controller

Davicom Semiconductor, Inc. 

DM9102A

Single Chip Fast Ethernet NIC Controller

3. Features

! Integrated Fast Ethernet MAC, Physical Layer and

transceiver in one chip.

! 128pin QFP/128pin LQFP with CMOS process.

! +3.3V Power supply with +5V tolerant I/O.

! Complies with PCI specification 2.2.

! PCI clock up to 40MHz.

! PCI Bus master architecture.

! PCI Bus burst mode data transfer.

! Two large independent transmission and receipt of

FIFO

! Up to 256K bytes Boot EPROM or Flash interface.

! EEPROM 93C46 interface automatically supports node

ID load and configuration information.

! Complies with IEEE 802.3u 100Base-TX and 802.3

10Base-T.

! Complies with IEEE 802.3u auto-negotiation protocol

for automatic link type selection.

! Supports IEEE 802.3x Full Duplex Flow Control

! VLAN frame length support.

! Complies with ACPI and PCI Bus Power Management.

! Supports the MII (Media Independent Interface) for an

external PHY

! Supports Wake-On-LAN function and remote wake-up

(Magic packet, Link Change and Microsoft® wake-up

frame).

! Supports 4 Wake-On-LAN (WOL) signals (active high

pulse, active low pulse, active high, active low.)

! High performance 100Mbps clock generator and data

recovery circuit.

! Digital clock recovery circuit, using advanced digital

algorithm to reduce jitter.

! Adaptive equalization circuit and Baseline wandering

restoration circuit for 100Mbps receiver.

! Provides Loopback mode for easy system diagnostics.

! Low power consumption modes:

- Power reduced mode (cable detection)

- Power down mode

- Selectable TX drivers for 1:1 or 1.25:1 transformers for

additional power reduction.

4

Final

Version: DM9102A-DS-F07

April 12, 2002

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