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FDC37C669FR Ver la hoja de datos (PDF) - SMSC -> Microchip

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FDC37C669FR Datasheet PDF : 172 Pages
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QFP
PIN
NO.
63-66
68-71
NAME
Port Data
100 IOCHRDY
24 nIDE Enable
DESCRIPTION OF PIN FUNCTIONS
SYMBOL
PD0-PD7
BUFFER
TYPE
I/O24
DESCRIPTION
The bi-directional parallel data bus is
used to transfer information between
CPU and peripherals.
IOCHRDY
OD24P
In EPP mode, this pin is pulled low to
extend the read/write command. This pin
has an internal pull-up.
nIDEEN
IDE/ALT IR PINS
O24P This active low signal is active when the
(Note 1) IDE is enabled and the I/O address is
accessing an IDE register.
Interrupt
Request H
IRQ_H
024
The interrupt request from a logical
device or IRQIN may be output on the
IRQH signal. Refer to the configuration
registers for more information.
OD24
If EPP or ECP Mode is enabled, this
output is pulsed low, then released to
allow sharing of interrupts.
25 nIDE Chip
Select 0
IRRX2
nHDCS0
IRRX2
O24P
(Note 1)
I
This is the Hard Disk Chip select
corresponding to the eight control block
addresses.
Alternate IR Receive input
26 nIDE Chip
Select 1
nHDCS1
IR Transmit 2 IRTX2
O24P
(Note 1)
O24P
This is the Hard Disk Chip select
corresponding to the alternate status
register.
Alternate IR transmit output
MISCELLANEOUS
20 CLOCK 14 CLK14
ICLK
The external connection to a single
source 14.318 MHz clock.
13

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