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LPC47N227TQFP

100 Pin Super I/O with LPC Interface for Notebook Applications

SMSC -> Microchip 

TQFP/STQFP

PIN #

NAME

23:20

LPC Address/

Data bus 3-0

24

LPC Frame

25

LPC

DMA/Bus Master

Request

26

PCI RESET

27

LPC Power Down

(Note 2)

28

PCI Clock

Controller

29

PCI Clock

30

Serial IRQ

17

Power Mgt. Event

(Note 7)

1

Drive Density 0

2

Drive Density 1

3

Motor On 0

4

Disk Change

DESCRIPTION OF PIN FUNCTIONS

BUFFER

SYMBOL

TYPE PER

FUNCTION1

DESCRIPTION

LPC INTERFACE

LAD[3:0]

PCI_IO Active high LPC signals used for

multiplexed command, address and data

bus.

nLFRAME

PCI_I

Active low signal indicates start of new

cycle and termination of broken cycle.

nLDRQ

PCI_O Active low signal used for encoded

DMA/Bus Master request for the LPC

interface.

nPCI_RESE

PCI_I

Active low signal used as LPC Interface

T

Reset.

nLPCPD

PCI_I

Active low Power Down signal indicates

that the LPC47N227 should prepare for

power to be shut on the LPC interface.

nCLKRUN

PCI_OD This signal is used to indicate the PCI

clock status and to request that a stopped

clock be started.

PCI_CLK

PCI_CLK PCI clock input.

SER_IRQ

PCI_IO Serial IRQ pin used with the PCI_CLK pin

to transfer LPC47N227 interrupts to the

host.

nIO_PME

(O12/OD12) This active low Power Management Event

signal allows the LPC47N227 to request

wakeup.

FLOPPY DISK INTERFACE

DRVDEN0 (O12/OD12) Indicates the drive and media selected.

Refer to configuration registers CR03,

CR0B, CR1F.

DRVDEN1 (O12/OD12) Indicates the drive and media selected.

Refer to configuration registers CR03,

CR0B, CR1F.

nMTR0

(O12/OD12) These active low output selects motor

drive 0.

nDSKCHG

IS

This input senses that the drive door is

open or that the diskette has possibly been

changed since the last drive selection.

This input is inverted and read via bit 7 of

I/O address 3F7H. The nDSKCHG bit also

depends upon the state of the Force Disk

Change bits in the Force FDD Status

Change configuration register (see

subsection CR17 in the Configuration

section).

5

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