LPC47U322 Ver la hoja de datos (PDF) - SMSC -> Microchip

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LPC47U322

128 Pin Enhanced Super I/O Controller for LPC Bus with Consumer Features and SMBus Controller

SMSC -> Microchip 

invert/non-invert output buffer type is retained.

The non-GPIO pins that function in this manner

are nRI, KDAT and MDAT.

The other GPIOs function as follows:

GP40

• Buffers powered by VCC, but in the

absence of VCC they are backdrive

protected. This pin does not have an input

buffer into the wakeup logic powered by

VTR.

This pin is not used for wakeup.

GP42, GP60, GP61:

• Buffers powered by VTR.

GP42 is the nIO_PME pin which is active under

VTR.

GP60 and GP61 have LED as the alternate

function and are able to control the pin under

VTR.

See the Table in the GPIO section for more

information.

The following list summarizes the blocks,

registers and pins that are powered by VTR.

• PME interface block

• Runtime register block (includes all PME,

SMI, GPIO and other miscellaneous

registers)

• “Wake on Specific Key” logic

• LED control logic

• Pins for PME Wakeup:

- GP42/nIO_PME (output, buffer

powered by VTR)

- nRI (input)

- KDAT (input)

- MDAT (input)

- GPIOs (GP10-GP17, GP20-GP22,

GP24-GP27, GP32-GP33, GP36,

GP37, GP41, GP43, GP50-GP57,

GP60, GP61) – all input-only except

GP60, GP61

• Other Pins

- GP60/LED1 (output, buffer powered by

VTR)

- GP61/LED2 (output, buffer powered by

VTR)

Maximum Current Values

The maximum current values are given in

Operational Description section under the

following conditions.

The maximum VTR current, ITR, is given with all

outputs open (not loaded). The total maximum

current for the part is the unloaded value PLUS

the maximum current sourced by all pins that

are driven by VTR. The pins that are powered

by VTR are as follows: GP42/nIO_PME,

GP60/LED1, GP61/LED2. These pins, if

configured as push-pull outputs, will source a

minimum of 6mA at 2.4V when driving.

The maximum VCC current, ICC, is given with all

outputs open (not loaded).

The maximum VREF current, IREF, is given with

all outputs open (not loaded).

Power Management Events (PME/SCI)

The LPC47U32x offers support for Power

Management Events (PMEs), also referred to as

System Control Interrupt (SCI) events. The

terms PME and SCI are used synonymously

throughout this document to refer to the

indication of an event to the chipset via the

assertion of the nIO_PME output signal on pin

14. See the “PME Support” section.

17

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