LPC47U327 Ver la hoja de datos (PDF) - SMSC -> Microchip

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LPC47U327

128 Pin Enhanced Super I/O Controller for LPC Bus with Consumer Features and SMBus Controller

SMSC -> Microchip 

TABLE OF CONTENTS

FEATURES ....................................................................................................................................... 1

GENERAL DESCRIPTION ................................................................................................................ 2

PIN CONFIGURATION...................................................................................................................... 6

DESCRIPTION OF PIN FUNCTIONS ................................................................................................ 7

Buffer Type Descriptions .............................................................................................................. 12

Pins That Require External Pullup Resistors................................................................................. 13

BLOCK DIAGRAM.......................................................................................................................... 14

3.3 VOLT OPERATION / 5 VOLT TOLERANCE.............................................................................. 15

POWER FUNCTIONALITY.............................................................................................................. 15

VCC Power.................................................................................................................................. 15

VTR Support................................................................................................................................ 15

VREF PIN.................................................................................................................................... 15

Internal PWRGOOD .................................................................................................................... 15

Indication of 32kHz Clock............................................................................................................. 16

Trickle Power Functionality .......................................................................................................... 16

Maximum Current Values............................................................................................................. 17

Power Management Events (PME/SCI) ........................................................................................ 17

FUNCTIONAL DESCRIPTION......................................................................................................... 18

Super I/O Registers ..................................................................................................................... 18

Host Processor Interface (LPC).................................................................................................... 18

LPC Interface............................................................................................................................... 19

FLOPPY DISK CONTROLLER........................................................................................................ 23

FDC Internal Registers................................................................................................................. 23

Status Register Encoding............................................................................................................. 36

DMA Transfers............................................................................................................................. 40

Controller Phases ........................................................................................................................ 40

Command Set/Descriptions ......................................................................................................... 42

Instruction Set ............................................................................................................................. 46

Data Transfer Commands............................................................................................................ 58

Control Commands...................................................................................................................... 64

Direct Support for Two Floppy Drives ........................................................................................... 71

SERIAL PORT (UART).................................................................................................................... 72

Register Description..................................................................................................................... 72

Programmable Baud Rate Generator (AND Divisor Latches DLH, DLL) ........................................ 79

Effect Of The Reset on Register File ............................................................................................ 80

FIFO Interrupt Mode Operation .................................................................................................... 80

FIFO Polled Mode Operation........................................................................................................ 80

Notes On Serial Port Operation.................................................................................................... 85

MPU-401 MIDI UART ...................................................................................................................... 86

Overview ..................................................................................................................................... 86

Host Interface .............................................................................................................................. 87

MPU-401 Command Controller .................................................................................................... 90

MIDI UART .................................................................................................................................. 91

MPU-401 Configuration Registers ................................................................................................ 92

PARALLEL PORT........................................................................................................................... 93

IBM XT/AT Compatible, Bi-Directional and EPP Modes ................................................................ 94

EPP 1.9 Operation....................................................................................................................... 96

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