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CY62148V

512K x 8 Static RAM

Cypress Semiconductor 

PRELIMINARY

Switching Waveforms (continued)

Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[11,12]

ADDRESS

CE

tWC

tSCE

CY62148V

tAW

tSA

tPWE

WE

OE

DATA I/O

NOTE 13

tHZOE

Write Cycle No.3 (WE Controlled, OE LOW)[11,12]

ADDRESS

CE

tSD

DATAIN VALID

tWC

tSCE

tHA

tHD

tSA

WE

DATAI/O NOTE 13

tHZWE

tAW

tPWE

tSD

DATA VALID

Note:

13. During this period the I/Os are in the output state and input signals should not be applied.

tHA

tHD

tLZWE

62148V-7

62148V-8

5

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