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MAX3940E_D

10Gbps EAM Driver with Integrated Bias Network

Maxim Integrated 

10Gbps EAM Driver with Integrated

Bias Network

Test Circuits and Timing Diagrams (continued)

CLK+

CLK-

DATA-

DATA+

tSU

tHD

VIS = 0.1VP-P TO 1VP-P

DC-COUPLED

0.1VP-P TO 0.8VP-P

AC-COUPLED

VIS

(DATA+) -

(DATA-)

IOUT

NOTE: IOUT RELATES TO RETIMED DATA

Figure 3. Setup and Hold Timing Definition

VID = 0.2VP-P TO 2VP-P

DC-COUPLED

0.2VP-P TO 1.6VP-P

AC-COUPLED

IMOD = 40mAP-P TO 120mAP-P

IBIAS = 0mA TO 50mA

50Ω

PATTERN

GENERATOR

50Ω

GND

50Ω

50Ω

50Ω

50Ω

DATA+

ROUT

50Ω

OUT

DATA-

MAX3940

IMOD

VEE

IBIAS

VEE

-5.2V

0.1µF

VEE

300pF

MODSET

BIASSET

VEE

VEE

OSCILLOSCOPE

50Ω

50Ω

ZL

Figure 4. AC Characterization Circuit

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