MB90587 Ver la hoja de datos (PDF) - Fujitsu

Número de pieza

componentes Descripción

Lista de partido

MB90587

16-bit Proprietary Microcontroller

Fujitsu 

MB90580B Series

Pin no.

Pin name

QFP*1 LQFP*2

Circuit

type

Function

General-purpose I/O port

14

12

P34

F

Functions as the HRQ pin in external bus mode if the HDE bit in the

(CMOS/H) EPCR register is “1”.

HRQ

Functions as the hold request input pin (HRQ) in external bus mode.

General-purpose I/O port

P35

Functions as the HAK pin in external bus mode if the HDE bit in the

15

13

F

EPCR register is “1”.

(CMOS/H)

HAK

Functions as the hold acknowledge output pin (HAK) in external bus

mode.

General-purpose I/O port

16

14

P36

F

Functions as the RDY pin in external bus mode if the RYE bit in the

(CMOS/H) EPCR register is “1”.

RDY

Functions as the external ready input pin (RDY) in external bus mode.

General-purpose I/O port

P37

Functions as the CLK pin in external bus mode if the CKE bit in the

17

15

F

EPCR register is “1”.

(CMOS/H)

CLK

Functions as the machine cycle clock output pin (CLK) in external bus

mode.

General-purpose I/O port.

P40

This pin serves as an open-drain output port with OD40 in the open-

drain control setting register (ODR4) set to “1”. [The pin is disabled

18

16

E

with the input setting (DDR4 register: D40=“0”).]

(CMOS/H) UART0 serial data input (SIN0) pin.

SIN0

When UART0 is operating for input, this input is used as required and

thus the output from any other function to the pin must be off unless

used intentionally.

General-purpose I/O port.

19

17

P41

This pin serves as an open-drain output port with OD41 in the open-

E

drain control setting register (ODR4) set to “1”. [The pin is disabled

(CMOS/H) with the input setting (DDR4 register: D41=“0”).]

SOT0

UART0 serial data output pin (SOT0).

This pin is enabled with the UART0 serial data output enabled.

General-purpose I/O port.

20

18

P42

This pin serves as an open-drain output port with OD42 in the open-

E

drain control setting register (ODR4) set to “1”. [The pin is disabled

(CMOS/H) with the input setting (DDR4 register: D42=“0”).]

SCK0

UART0 serial clock I/O pin (SCK0).

This pin is enabled with the UART0 clock output enabled.

*1: FPT-100P-M06

*2: FPT-100P-M05

(Continued)

10

Share Link: